ATWEBDVK-02VOIP Atmel, ATWEBDVK-02VOIP Datasheet - Page 11
ATWEBDVK-02VOIP
Manufacturer Part Number
ATWEBDVK-02VOIP
Description
KIT DEV TCP/IP AT89C51RD2 VOIP
Manufacturer
Atmel
Series
@Webr
Datasheet
1.ATWEBDVK-02RC.pdf
(137 pages)
Specifications of ATWEBDVK-02VOIP
Main Purpose
*
Embedded
*
Utilized Ic / Part
AT89C51RD2
Primary Attributes
*
Secondary Attributes
*
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
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Table 4-1.
4235K–8051–05/08
V
V
P0.0 - P0.7
P1.0 - P1.7
Mnemonic
SS
CC
Pin Description
PLCC44 VQFP44
43 - 36
2 - 9
22
44
2
3
4
5
6
7
8
37 - 30
40 - 44
1 - 3
16
38
40
41
42
43
44
1
2
Pin Number
PLCC68
9,6, 5, 3
15, 14,
12, 11,
19, 21,
22, 23,
25, 27,
28, 29
51
17
19
21
22
23
25
27
28
6, 5, 3, 2,
VQFP64
61,60,59
10, 12,
13, 14,
16, 18,
19, 20
64,
40
10
12
13
14
16
18
19
8
Type
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I
I
I
I
I
Name and Function
Ground: 0V reference
Power Supply: This is the power supply voltage for normal, idle and
power-down operation
Port 0: Port 0 is an open-drain, bidirectional I/O port. Port 0 pins that
have 1s written to them float and can be used as high impedance inputs.
Port 0 must be polarized to V
current consumption. Port 0 is also the multiplexed low-order address
and data bus during access to external program and data memory. In this
application, it uses strong internal pull-up when emitting 1s. Port 0 also
inputs the code bytes during EPROM programming. External pull-ups are
required during program verification during which P0 outputs the code
bytes.
Port 1: Port 1 is an 8-bit bidirectional I/O port with internal pull-ups. Port 1
pins that have 1s written to them are pulled high by the internal pull-ups
and can be used as inputs. As inputs, Port 1 pins that are externally
pulled low will source current because of the internal pull-ups. Port 1 also
receives the low-order address byte during memory programming and
verification.
Alternate functions for AT89C51RD2/ED2 Port 1 include:
P1.0: Input/Output
T2 (P1.0): Timer/Counter 2 external count input/Clockout
P1.1: Input/Output
T2EX: Timer/Counter 2 Reload/Capture/Direction Control
SS: SPI Slave Select
P1.2: Input/Output
ECI: External Clock for the PCA
P1.3: Input/Output
CEX0: Capture/Compare External I/O for PCA module 0
P1.4: Input/Output
CEX1: Capture/Compare External I/O for PCA module 1
P1.5: Input/Output
CEX2: Capture/Compare External I/O for PCA module 2
MISO: SPI Master Input Slave Output line
When SPI is in master mode, MISO receives data from the slave
peripheral. When SPI is in slave mode, MISO outputs data to the master
controller.
P1.6: Input/Output
CEX3: Capture/Compare External I/O for PCA module 3
SCK: SPI Serial Clock
CC
AT89C51RD2/ED2
or V
SS
in order to prevent any parasitic
11
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