EVAL6206PD STMicroelectronics, EVAL6206PD Datasheet - Page 14

EVAL BOARD FOR L6206 SERIES

EVAL6206PD

Manufacturer Part Number
EVAL6206PD
Description
EVAL BOARD FOR L6206 SERIES
Manufacturer
STMicroelectronics
Datasheet

Specifications of EVAL6206PD

Mfg Application Notes
PractiSPIN AppNote
Design Resources
EVAL6206PD/6206PD Gerber Files EVAL6206PD Schematic/Bill of Materials
Main Purpose
Power Management, H Bridge Driver (Internal FET)
Embedded
No
Utilized Ic / Part
L6206
Primary Attributes
2 H-Bridge, 8 ~ 52V Output, Use with PractiSPIN
Secondary Attributes
Temperature Protection, Adjustable Current Limit
Applications
Motor Control
Processor To Be Evaluated
L6206PD
For Use With
497-4138 - EVALUATION BOARD PRACTISPIN
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
497-4135
L6206
PARALLELED OPERATION
The outputs of the L6206 can be paralleled to increase the output current capability or reduce the power dissi-
pation in the device at a given current level. It must be noted, however, that the internal wire bond connections
from the die to the power or sense pins of the package must carry current in both of the associated half bridges.
When the two halves of one full bridge (for example OUT1
current rating is not increased since the total current must still flow through one bond wire on the power supply
or sense pin. In addition the over current detection senses the sum of the current in the upper devices of each
bridge (A or B) so connecting the two halves of one bridge in parallel does not increase the over current detec-
tion threshold.
For most applications the recommended configuration is Half Bridge 1 of Bridge A paralleled with the Half Bridge
1 of the Bridge B, and the same for the Half Bridges 2 as shown in Figure 13. The current in the two devices
connected in parallel will share very well since the R
When connected in this configuration the over current detection circuit, which senses the current in each bridge
(A and B), will sense the current in upper devices connected in parallel independently and the sense circuit with
the lowest threshold will trip first. With the enables connected in parallel, the first detection of an over current in
either upper DMOS device will turn of both bridges. Assuming that the two DMOS devices share the current
equally, the resulting over current detection threshold will be twice the minimum threshold set by the resistors
R
In this configuration the resulting Bridge has the following characteristics.
- Equivalent Device: FULL BRIDGE
- R
- 5.6A max RMS Load Current
- 11.2A max OCD Threshold
Figure 13. Parallel connection for higher current
14/23
CLA
8-52V
DS(ON)
VS
+
or R
GROUND
-
POWER
DC
GROUND
SIGNAL
CLB
0.15
LOAD
C
1
in figure 13. It is recommended to use R
Typ. Value @ T
C
2
C
BOOT
J
D
= 25°C
1
D
2
R
P
SENSE
SENSE
VBOOT
C
OUT1
OUT2
OUT1
OUT2
P
GND
GND
GND
GND
VCP
VS
VS
A
B
A
B
A
A
B
B
DS(ON)
20
17
22
15
3
10
5
21
8
16
18
19
6
7
CLA
= R
of the devices on the same die is well matched.
A
and OUT2
CLB
.
A
) are connected in parallel, the peak
D02IN1364
14
23
11
12
24
13
9
4
1
2
OCD
EN
OCD
EN
IN1
IN2
IN1
IN2
PROGCL
PROGCL
B
A
A
A
B
B
B
A
A
B
R
R
C
CLA
CLB
EN
R
EN
EN
IN1
IN2

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