DC-VIDEO-TVP5146N Altera, DC-VIDEO-TVP5146N Datasheet
DC-VIDEO-TVP5146N
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DC-VIDEO-TVP5146N Summary of contents
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... Innovation Drive San Jose, CA 95134 (408) 544-7000 www.altera.com Stratix II EP2S180 DSP Development Board Reference Manual Development Board Version: Document Version: Document Date: 1.0.0 1.0.0 August 2005 ...
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... Altera Corporation in the U.S. and other countries. All other product or service names are the property of their respective holders. Al- tera products are protected under numerous U ...
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... About This Manual How to Contact Altera .............................................................................................................................. v Typographic Conventions ........................................................................................................................ v Chapter 1. Introduction General Description ............................................................................................................................... 1–1 Stratix II EP2S180 DSP Devlopment Board ................................................................................................................................ 1–1 Components ...................................................................................................................................... 1–1 Debugging Interfaces ....................................................................................................................... 1–2 Expansion Interfaces ........................................................................................................................ 1–2 Handling the Board ............................................................................................................................... 1–2 Chapter 2. Board Components & Interfaces Components & Interfaces ..................................................................................................................... 2–1 Environmental Requirements ......................................................................................................... 2–3 Using the Board ..................................................................................................................................... 2– ...
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... Expansion Interfaces ........................................................................................................................... 2–40 TI-EVM/FPDP Connector (J31, J33) ............................................................................................ 2–41 RS-232C Serial I/O Interface ......................................................................................................... 2–43 Analog Devices Corporation External A/D Support ............................................................... 2–45 Expansion Prototype Connector (J23, J24, J25) ........................................................................... 2–47 Expansion Prototype Connector (J26, J27, J28) ........................................................................... 2–49 iv Stratix II EP2S180 DSP Development Board Reference Manual Altera Corporation ...
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... This manual provides comprehensive information about the Altera Stratix II EP2S180 Development Board. How to Contact For the most up-to-date information about Altera products the Altera world-wide web site at www.altera.com. For technical support on Altera this product www.altera.com/mysupport. For additional information about Altera products, consult the sources shown below. ...
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... The feet direct you to more information on a particular topic. vi Preliminary Stratix II EP2S180 Development Board Reference Manual Meaning , PIA , Active-low signals are denoted by suffix input. c:\qdesigns\tutorial\chiptrip.gdf ), as well as logic function names (e.g., SUBDESIGN , data1 , e.g resetn . Also, sections are shown in TRI Altera Corporation August 2005 ...
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... Board Components ■ ■ ■ Altera Corporation August 2005 ), users can quickly develop powerful DSP systems. Altera’s SM Plus technology allows users to evaluate MegaCore ® ® II EP2S180 DSP development board is included with the DSP Analog I/O Two 12-bit 125-MHz A/D converters ● ...
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... One female 9-pin RS-232 connector 10/100 Ethernet MAC/PHY Eight user-defined LEDs Socketed 100-MHz oscillator Single 16-V DC power supply (adapter included) Active heat sink One Mictor-type connector for Agilent and Tektronix logic analyzers Several 0.1-inch headers Two connectors for Analog Devices A/D converter daughter cards ...
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... Figure 2–1. Stratix II EP2S180 DSP Development Board Components nterfaces Note to Figure 2–1: (1) A TI-EVM/FPDP connector (J31, J33) is found on the reverse side of the board. Altera Corporation 2. Board Components & shows a top view of the board components and interfaces. Core Version a.b.c variable Interfaces 2–1 ...
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... Stratix II device, which must be configured to generate and accept transmissions. Y1 Socketed on-board 100-MHz oscillator. J22 (adapter) Board adapter for included 16-V DC power supply J21 JTAG Connector used to configure the Stratix II device directly J13 JTAG connector used to configure the configuration controller Core Version a ...
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... The DSP Development Kit, Stratix II Professional Edition includes a heat sink and fan combination, also known as an active heat sink. Depending on the specific requirements of your application, this level of cooling may not be necessary. Altera Corporation Board Designation U45 One 8-bit, 180 megapixels-per-second triple D/A ...
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... Apply Power Apply power to the board by connecting the 16-V DC power supply adapter in the DSP Development Kit, Stratix II Professional Edition to the on-board power adapter connector (J22), and then switch SW9 to the ON position. All of the board components draw power either directly from this 16-V supply or from the 3 ...
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... Stratix II device, the board has a nonvolatile configuration scheme. This scheme consists of flash memory and a configuration controller (U10), which is an Altera EPM7256 PLD. The configuration controller device is non-volatile (i.e., it does not lose its configuration data when the board is powered down) and it comes factory-programmed with logic that configures the Stratix II EP2S180F1020C3 device (U18) from data stored in flash (U17) on power-up ...
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... Generate a flash file to load into the flash device. a. Run the NIOS II SDK Shell. b. Change directories to the project location. c. Run the sof2flash utility: Copy the flash file into the on-board flash device. Core Version a.b.c variable Table 2–2 for more details. Switch 3 Switch 4 Closed Open Open Open Altera Corporation ...
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... Along with the LED counter, the factory design includes two blocks of IP generated by the Altera NCO Compiler. One of these oscillators is running at 10 times the frequency of the other, but both of them have the same amplitude, covering 13 bits of dynamic range. Two sine waves generated by these blocks are added together and the output is converted from a 2's complement representation into unsigned integer format ...
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... Crystal oscillator Core Version a.b.c variable 256K × 36 SRAM 256K × 36 SRAM Mictor Connector Analog Devices A/D Converters Connector Prototyping Area 0.1-inch Digital I/O Headers RS-232 LEDs 5.0 V Vccint (1.5 V) Regulators Vccio (3.3-V) Pushbutton Switches (1.2 V), V CCINT CCIO . Altera Corporation ...
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... DAC A (U14 pin 28) (2) DAC B (U15 pin 28) (2) DAC B (U15 pin 28) SDRAM (U39 U40 pins 68) ADC A (U1 pins 8, 7) (1) (1) ADC B (U2 pins 8, 7) Audio CODEC (U5 pin 25) Mictor Connector (J20 pin 5) PROTO1 (J25 pin 11) and PROTO2 (J28 pin 11) via a buffer (U7) 2–9 ...
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... A16 Stratix II device pins AL17 and B16 PROTO1 (J25 pin 9) and PROTO2 (J28 pin 9) via a buffer (U7) CPLD (U10 pin 125) ADC A (U1 pins 8, 7) and B (1) (U2 pins 8, 7) DAC A (U14 pin 28) and B (U15 pin 28) (2) Stratix II device pin U1 ADC A (U1 pins 8, 7) and B ...
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... Item Description Y1 ECS-UPO-8PIN 100MHz Oscillator ECS Inc. www.ecsxtal.com Core Version a.b.c variable Stratix II EP2S180 DSP Development Board Reference Manual Board Components & Interfaces Expansion Prototype Connector Expansion Prototype Connector SDRAM Audio CODEC CLK ADC A Buffer CLK ADC B Buffer DAC DAC 2–11 ...
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... J10. To use an external clock signal, remove the crystal oscillator from its socket. Note the correct orientation of the oscillator before removing it to ensure you reinstall it correctly for future use. Core Version a.b.c variable adaptive logic , ® package. Altera Corporation ...
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... Switch Inputs The board has four push-button switches for user-defined logic input. Each push-button signal, when pressed drives logic low, and when released resumes driving logic high. Altera Corporation describes the features of the Stratix II EP2S180F1020C3 device. Feature (1) (2) (3) Table 2–6: One ALM contains two ALUTs ...
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... Stratix II device. This LED illuminates when the factory configuration is being transferred from flash memory and stays illuminated if the factory configuration was successfully loaded into the Stratix II device. Core Version a.b.c variable Altera Corporation ...
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... HEX_1G HEX_1DP LEDs pld_LED0 (board designation: D1) pld_LED1 (board designation: D2) pld_LED2 (board designation: D3) pld_LED3 (board designation: D4) pld_LED4 (board designation: D5) pld_LED5 (board designation: D6) pld_LED6 (board designation: D7) pld_LED7 (board designation: D8) Altera Corporation shows the pin-outs for the 7-segment display and LEDs. Signal Stratix II Pin ...
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... The clock signal that drives the A/D converters can originate from the Stratix II device, the external clock input, or the on-board 100-MHz oscillator. Jumper J3 controls which clock is used for ADC A and J4 is used 2–16 Stratix II EP2S180 DSP Development Board Reference Manual shows the pin-outs for the 7-segment display. ...
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... ADC B. clock signals. The selected clock will pass through a differential LVPECL buffer before arriving at the clock input to both A/D converters Table 2–10. A/D Clock Source Settings J3, J4 Setting Pins 1 and 2 Pins 3 and 4 Pins 5 and 6 Table 2–11 Table 2–11. A/D Converter Reference ...
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... Outs adcB_D0 (LSB) adcB_D1 adcB_D2 adcB_D3 adcB_D4 adcB_D5 adcB_D6 adcB_D7 adcB_D8 adcB_D9 adcB_D10 adcB_D11 (MSB) 2–18 Stratix II EP2S180 DSP Development Board Reference Manual and 2–13 show the ADC A (U1) and ADC B (U2) Stratix II Signal Name Stratix II Pin Signal Name Stratix II Pin ...
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... The output of the transformer is then brought to an SMA connector. Figure 2–5. On-Board Circuitry after D/A Converter 1 Altera Corporation The converters produce 14-bit samples at a maximum rate of 165 MSPS. The analog output from each D/A converter is single-ended. The D/A converters expect data in an unsigned integer format. ...
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... D/A converters. Clock Source Stratix II PLL dac_PLLCLK1, Circuitry dac_PLLCLK2 Stratix II PLL dac_PLLCLK1_n, Circuitry dac_PLLCLK2_n OSC or External dac_CLK_IN1, input clock (J10) dac_CLK_IN2 External input clock dac_DACCLKIN1, (J12) DA EXT CLK dac_DACCLKIN2 Core Version a.b.c variable , 5.0-V DD Signal Name Altera Corporation ...
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... Table 2–17. D/A A (U14, J15) Stratix II Pin- Outs dacA_D1 (MSB) dacA_D2 dacA_D3 dacA_D4 dacA_D5 dacA_D6 dacA_D7 dacA_D8 dacA_D9 dacA_D10 dacA_D11 dacA_D12 dacA_D13 dacA_D14 (LSB) Altera Corporation and 2–18 show the D/A A (U14) and D/A B (U15) Stratix II Signal Name Stratix II Pin U5 U6 U10 U11 V9 V10 ...
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... Signal Name (1) Table 2–18: The Texas Instruments (TI) naming conventions differ from those of Altera Corporation. The TI data sheet for the DAC 904 D/A converter lists bit 1 as the most significant bit (MSB) and bit 14 as the least significant bit (LSB). ® II embedded processor as general-purpose memory. The two 16-bit Table 2– ...
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... SE_A19 SE_D0 SE_D1 SE_D2 SE_D3 SE_D4 SE_D5 SE_D6 SE_D7 SE_D8 SE_D9 SE_D10 SE_D11 SE_D12 SE_D13 SE_D14 SE_D15 SE_D16 SE_D17 Altera Corporation Pin Name Pin Number AL29 AM29 AJ28 AH28 AK20 AJ20 AL21 AL22 AJ22 AH22 AL23 AL24 AJ25 AH25 AL25 AD18 ...
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... AB17 AC19 AL26 AL27 AL28 AK28 AK29 AC13 AD10 AC11 AE11 AG11 AK10 AK11 AL11 AL12 AG14 AH14 lists the reference information for the SRAM memory. Item U43, U44 IDT71V416S10PH SRAM Memory IDT www.idt.com Core Version a.b.c variable Description Altera Corporation ...
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... Stratix II configuration data, Nios II embedded processor software, or both) into flash memory. For an example of programming the flash memory, refer to Development Board” on page Altera Corporation A Nios II embedded processor implemented in the Stratix II device can use the flash as general-purpose readable memory and nonvolatile storage. ...
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... Item Description U17 AM29LV128MH103REI Flash Memory AMD www.amd.com Core Version a.b.c variable Pin Number AC31 AB30 AB29 Y29 Y28 AA30 AA29 AB32 AB31 AH30 AH29 AJ32 AJ31 AG30 AG29 AH32 AH31 AA32 AA31 W32 Y30 Altera Corporation ...
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... SDRAM devices as a large, linearly-addressable memory. Table 2–23 Table 2–23. SDRAM Device (U39) Pin-Outs (Part A10 A11 BA0 BA1 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 Altera Corporation lists the Stratix II device pin-outs for SDRAM device U39. Pin Name Pin Number Connects to Stratix II Pin Core Version a ...
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... Pin Number Connects to Stratix II Pin Core Version a.b.c variable AK6 AJ6 AM6 AM7 AK7 AJ7 AM8 AJ10 AK8 AJ8 AM9 AF12 AG10 AF10 AG12 AJ11 AH11 AL10 AM10 AK12 AJ12 AM11 AM12 AK5 AG8 AH8 AL5 AK4 AL8 AL7 AL6 AK9 AK16 Altera Corporation ...
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... A8 A9 A10 A11 BA0 BA1 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 Altera Corporation lists the Stratix II device pin-outs for SDRAM device U40. Pin Name Pin Number Connects to Stratix II Pin ...
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... SDRAM memory. Item U39, U40 MT48LC4M32B2TG-7 SDRAM Memory Micron www.micron.com Core Version a.b.c variable AG22 AG23 AM23 AK23 AK24 AM24 AK25 AH24 AH26 AG24 AM26 AM25 AJ26 AK26 AK13 AL13 AB12 AC12 AK4 AL8 AL7 AL6 Description Altera Corporation ...
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... ENET_SRDY_N ENET_W_R_N SE_A0 SE_A1 SE_A2 SE_A3 SE_A4 SE_A5 SE_A6 SE_A7 SE_A8 SE_A9 SE_A10 SE_A11 Altera Corporation for Stratix II pin-outs for Ethernet MAC/PHY device U16.t Pin Name Pin Number AA25 AC25 AE26 AE25 AD25 AD24 T20 AB23 V26 AC24 AB26 T26 ...
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... Pin Number AL22 AJ22 AH22 AL23 AL24 AJ25 AH25 AL25 AD18 AB18 AB19 AC20 AD20 AE20 AB20 AF20 AC21 AD21 AB21 AE21 AG20 AF21 AD22 AF22 AE22 AC17 AE19 AD19 AC18 AB17 AC19 AL26 AL27 Core Version a.b.c variable Altera Corporation ...
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... Most pins of CON1 connect to I/O pins on the FPGA. The following pins have special connections: ■ ■ Altera Corporation Pin Name Pin Number lists the reference information for the Ethernet MAC/PHY. Item ATA (hot-swappable mode) IDE (IDE hard-disk mode) Pin 13 of CON1 (VCC) is driven by a power MOSFET that is controlled by an FPGA I/O pin ...
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... A05 A04 A03 A02 A01 A00 DO0 DO1 DO2 IOCS16# CD2# CD1# Core Version a.b.c variable Connects to (1) GND AA3 AA1 AE3 AF1 AD12 AF3 AF4 AG1 ( AD6 AD7 AA8 AA9 AE2 AD2 AE1 AB3 AB1 Y4 AD1 AB8 (3) AC15 Altera Corporation ...
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... Table 2–28. CompactFlash (CON1) Pin Table (Part CompactFlash Notes to (1) (2) (3) (4) Altera Corporation Pin on CompactFlash Function (U60) (CON1) D11 D12 D13 D14 D15 CS1# VS1# IORD# IOWR# WE# INTRQ VCC CSEL# VS2# (4) RESET WAIT# INPACK# REG# DASP# PDIAG# DO8 DO9 D10 VSS Table 2–28: All pin numbers represent I/O pins on the FPGA, unless otherwise noted ...
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... Mictor connector. For details see www.fs2.com. 2–36 Stratix II EP2S180 DSP Development Board Reference Manual lists the reference information for the CompactFlash Item Description CON1 53856-5010 CompactFlash connector Molex www.molex.com shows an example of an in-target system analyzer ISA-Nios/T Core Version a.b.c variable Altera Corporation ...
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... Figure 2–7 Stratix II device. noted, labels indicate Stratix II device pin numbers. Figure 2–7. Mictor Connector Signaling Figure 2–8. Debug Mictor Connector - J20 Altera Corporation J25 below shows connections from the Mictor connector to the Figure 2–8 shows the pin-out for J20. Unless otherwise ...
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... LSB linearity error Internal bandgap voltage reference Low glitch energy Single 3.3-V power supply shows the pin-outs for the VGA interface. Signal Core Version a.b.c variable Stratix II Pin E11 G10 G11 G12 Altera Corporation ...
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... Table 2–32 Table 2–32. VGA Interface Device Reference Board reference Part number Device description Voltage Manufacturer Manufacturer web site Altera Corporation Signal Stratix II Pin D12 A11 B11 A12 F10 A10 B10 D10 D11 G13 E13 ...
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... AL18 describes the device used to implement the CODEC. Item Stereo Audio CODEC, 8-96 KHz A TI-EVM/FPDP connector (J31, J33), located on the reverse side of the board An RS-232C Serial I/O interface (J29) Core Version a.b.c variable Description U5 TLV320AIC23PW 3.3 V Texas Instruments www.ti.com Altera Corporation ...
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... Altera Corporation Two 0.1-inch headers specifically designed to be used with external analog-to-digital devices made by Analog Devices Corporation (J6, J5) Two Altera Expansion Prototype Connectors (J23, J24, J25; J26, J27, J28) lists the pin-outs for the TI-EVM and FPDP connectors. TI-EVM Signal Name Core Version a ...
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... Core Version a.b.c variable Stratix II Pin C20 E20 A21 C21 A22 C22 D23 D21 F22 F23 A23 C23 C24 A24 A25 A26 D26 C26 E24 C25 E27 E26 A27 A28 D27 C27 B29 A29 D28 E28 D19 B21 D22 Altera Corporation ...
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... The board contains a DB9 connector (J29), which provides a bidirectional RS-232C serial I/O interface. The board contains the transceiver (U41), however the logic controller (UART) must be implemented in the Stratix II device. RS-232C interface. Altera Corporation TI-EVM Signal Name Table 2–37 describes the device used to implement the Core Version a.b.c variable Stratix II EP2S180 DSP Development Board Reference Manual Board Components & ...
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... Connector Pin # StratixII Pin # Direction Function shows the pin-outs for the RS-232C interface. Signal Stratix II Pin L17 L16 K13 H14 K16 K17 K15 L15 Core Version a.b.c variable GND DTR1 RXD1 TXD1 DCD1 IN IN OUT OUT K13 L16 L17 H14 K17 K15 ...
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... Table 2–38. ADI Connector (J5, J6) Pin-Outs (Part Adi_D0 Adi_D1 Adi_D2 Adi_D3 Adi_D4 Adi_D5 Adi_D6 Adi_D7 Adi_D8 Adi_D9 Adi_D10 Altera Corporation lists reference information for the RS-232C transciever device. Item Description U41 MAX221E RS-232 transceiver 3.3 V Maxim www.maxim-ic.com Two AD9433 converters Two AD6645 converters One AD9430 converter lists the pin-outs for the ADI connectors ...
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... Adi_D16 Adi_D17 Adi_D18 Adi_D19 Adi_D20 Adi_D21 Adi_D22 Adi_D23 Adi_D24 Adi_D25 Adi_D26 Adi_D27 Adi_D28 Adi_D29 Adi_D30 Adi_D31 Adi_D32 Adi_D33 2–46 Stratix II EP2S180 DSP Development Board Reference Manual ADI Signal Name Stratix II Pin Core Version a.b.c variable L10 M10 M11 M8 M9 Altera Corporation ...
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... Stratix II device. Unless otherwise noted, labels indicate Stratix II device pin numbers. Figure 2–10. Expansion Prototype Connector - J23, J24, J25 Altera Corporation 41 I/O pins for prototyping. All 41 I/O pins connect to user I/O pins on the Stratix II device. Each signal passes through analog switches (U19, U20, U21, U22 and U25) to protect the Stratix II device from 5 V logic levels ...
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... Expansion Interfaces Figure 2–11. Expansion Prototype Connector Pin Information - J23, J24, J25 Notes to Figure 2–11: (1) Unregulated voltage from power transformer (2) Clk from board oscillator (3) Clk from the Stratix II device via buffer (4) Clk output from the card to the Stratix II device 2–48 Stratix II EP2S180 DSP Development Board Reference Manual ...
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... Stratix II device. Unless otherwise noted, the labels indicate Stratix II device pin numbers. Figure 2–12. Expansion Prototype Connector - J26, J27, J28 Altera Corporation 41 I/O pins for prototyping. All 41 I/O pins connect to user I/O pins on the Stratix II device. Each signal passes through analog switches (U27, U28, U29, U30 and U31) to protect the Stratix II device from 5-V logic levels ...
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... Expansion Interfaces Figure 2–13. Expansion Prototype Connector -Pin Information for J26, J27, & J28 Notes to Figure 2–13: (1) Unregulated voltage from power transformer (2) Clk from board oscillator (3) Clk from the Stratix II device via buffer (4) Clk output from card connected to the Stratix II device. ...