DC-VIDEO-TVP5146N Altera, DC-VIDEO-TVP5146N Datasheet - Page 30
DC-VIDEO-TVP5146N
Manufacturer Part Number
DC-VIDEO-TVP5146N
Description
VIDEO DAUGHTER CARD
Manufacturer
Altera
Series
Stratix® IIIr
Datasheets
1.EP3SL150F780C4N.pdf
(16 pages)
2.EP3SL150F780C4N.pdf
(332 pages)
3.DC-VIDEO-TVP5146N.pdf
(58 pages)
Specifications of DC-VIDEO-TVP5146N
Main Purpose
Video, Daughter Card
Embedded
No
Utilized Ic / Part
Altera Dev Kits
Primary Attributes
Dual Composite Video Input - NTSC or PAL
Secondary Attributes
10-bit BT.656 Output, Compatible with Expansion Connector, Standard on Most Altera Development Kits
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
544-1704
Board Components
2–22
Stratix II EP2S180 DSP Development Board Reference Manual
SRAM Memory (U43 & U44)
U43 and U44 are two 256 Kbyte x 16-bit asynchronous SRAM devices.
They are connected to the Stratix II device so they can be used by a
Nios
devices can be used in parallel to implement a 32-bit wide memory
subsystem. Refer to
devices U43 and U44.
Note to
(1)
dacB_D1 (MSB)
dacB_D2
dacB_D3
dacB_D4
dacB_D5
dacB_D6
dacB_D7
dacB_D8
dacB_D9
dacB_D10
dacB_D11
dacB_D12
dacB_D13
dacB_D14 (LSB)
SE_A0
SE_A1
SE_A2
SE_A3
SE_A4
Table 2–18. D/A B (U15, J17) Stratix II Pin-Outs
Table 2–19. SRAM Memory (U43 & U44) (Part 1
of 3)
®
The Texas Instruments (TI) naming conventions differ from those of Altera
Corporation. The TI data sheet for the DAC 904 D/A converter lists bit 1 as the
most significant bit (MSB) and bit 14 as the least significant bit (LSB).
II embedded processor as general-purpose memory. The two 16-bit
Signal Name
Table
Pin Name
Core Version a.b.c variable
2–18:
(1)
Table 2–19
for Stratix II device pin-outs for SRAM
Pin Number
AM27
AM28
AK27
AJ27
AD8
Stratix II Pin
AA10
AA11
Y10
Y11
AB5
AB6
AA6
AA7
W4
W5
Y6
Y7
Y8
Y9
Altera Corporation