ATA6613-EK Atmel, ATA6613-EK Datasheet - Page 178
ATA6613-EK
Manufacturer Part Number
ATA6613-EK
Description
BOARD DEMO LIN-MCM FOR ATA6613
Manufacturer
Atmel
Specifications of ATA6613-EK
Main Purpose
Interface, LIN + MCU
Embedded
Yes, MCU, 8-Bit
Utilized Ic / Part
ATA6613
Primary Attributes
LIN-SBC (System-Basis-Chip) Transceiver, LIN 2.0, Voltage Regulator, Window Watchdog
Secondary Attributes
16 kB Flash, 4 Power Modes: Pre-Normal, Normal, Sleep, Silent, 48-QFN
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
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6.15.8.3
6.15.8.4
6.15.8.5
178
Atmel ATA6612/ATA6613
Timer/Counter Register – TCNT2
Output Compare Register A – OCR2A
Output Compare Register B – OCR2B
Table 6-65.
If external pin modes are used for the Timer/Counter0, transitions on the T0 pin will clock the
counter even if the pin is configured as an output. This feature allows software control of the
counting.
The Timer/Counter Register gives direct access, both for read and write operations, to the
Timer/Counter unit 8-bit counter. Writing to the TCNT2 Register blocks (removes) the Com-
pare Match on the following timer clock. Modifying the counter (TCNT2) while the counter is
running, introduces a risk of missing a Compare Match between TCNT2 and the OCR2x
Registers.
The Output Compare Register A contains an 8-bit value that is continuously compared with
the counter value (TCNT2). A match can be used to generate an Output Compare interrupt, or
to generate a waveform output on the OC2A pin.
The Output Compare Register B contains an 8-bit value that is continuously compared with
the counter value (TCNT2). A match can be used to generate an Output Compare interrupt, or
to generate a waveform output on the OC2B pin.
Initial Value
Initial Value
Initial Value
Read/Write
Read/Write
Read/Write
CS22
Bit
Bit
Bit
0
0
0
0
1
1
1
1
Clock Select Bit Description
R/W
R/W
R/W
7
0
7
0
7
0
CS21
0
0
1
1
0
0
1
1
R/W
R/W
R/W
6
0
6
0
6
0
CS20
R/W
R/W
R/W
0
1
0
1
0
1
0
1
5
0
5
0
5
0
R/W
R/W
R/W
Description
No clock source (Timer/Counter stopped).
clk
clk
clk
clk
clk
clk
clk
OCR2B[7:0]
OCR2A[7:0]
4
TCNT2[7:0]
0
4
0
4
0
T2S
T2S
T2S
T2S
T2S
T
T
2
2
S
S
/256 (From prescaler)
/1024 (From prescaler)
/(No prescaling)
/8 (From prescaler)
/32 (From prescaler)
/64 (From prescaler)
/128 (From prescaler)
R/W
R/W
R/W
3
0
3
0
3
0
R/W
R/W
R/W
2
0
2
0
2
0
R/W
R/W
R/W
1
0
1
0
1
0
R/W
R/W
R/W
0
0
0
0
9111H–AUTO–01/11
0
0
OCR2B
OCR2A
TCNT2
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