ATAVRSB202 Atmel, ATAVRSB202 Datasheet - Page 180

• Manufacturer Part Number: ATAVRSB202
• Description: KIT BATT MGMT FOR ATMEGA32HVB
• Manufacturer: Atmel

Specifications of ATAVRSB202

• Main Purpose: *
• Embedded: *
• Utilized Ic / Part: *
• Primary Attributes: *
• Secondary Attributes: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

27.7.5
8042B–AVR–06/10
Miscellaneous States
Figure 27-18. Formats and States in the Slave Transmitter Mode
There are two status codes that do not correspond to a defined TWI state, see
Status 0xF8 indicates that no relevant information is available because the TWINT flag is not
set. This occurs between other states, and when the TWI is not involved in a serial transfer.
Status 0x00 indicates that a bus error has occurred during a Two-wire Serial Bus transfer. A bus
error occurs when a START or STOP condition occurs at an illegal position in the format frame.
Examples of such illegal positions are during the serial transfer of an address byte, a data byte,
or an acknowledge bit. When a bus error occurs, TWINT is set. To recover from a bus error, the
TWSTO flag must set and TWINT must be cleared by writing a logic one to it. This causes the
TWI to enter the not addressed Slave mode and to clear the TWSTO flag (no other bits in TWCR
are affected). The SDA and SCL lines are released, and no STOP condition is transmitted.
Reception of the own
slave address and one or
more data bytes
Arbitration lost as master
and addressed as slave
Last data byte transmitted.
Switched to not addressed
slave (TWEA = '0')
From master to slave
From slave to master
S
SLA
R
DATA
$A8
$B0
A
A
n
A
DATA
ATmega16HVB/32HVB
Any number of data bytes
and their associated acknowledge bits
This number (contained in TWSR) corresponds
to a defined state of the Two-wire Serial Bus. The
prescaler bits are zero or masked to zero
$B8
A
DATA
$C0
$C8
A
A
Table
P or S
All 1's
P or S
27-6.
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