HW-V5-ML523-FXT-UNI-G-J Xilinx Inc, HW-V5-ML523-FXT-UNI-G-J Datasheet - Page 7
![no-image](/images/no-image-200.jpg)
HW-V5-ML523-FXT-UNI-G-J
Manufacturer Part Number
HW-V5-ML523-FXT-UNI-G-J
Description
BOARD EVAL FOR VIRTEX-5
Manufacturer
Xilinx Inc
Series
Virtex™ -5r
Datasheet
1.HW-V5-ML523-FXT-UNI-G-J.pdf
(36 pages)
Specifications of HW-V5-ML523-FXT-UNI-G-J
Main Purpose
Interface, Transceiver, RocketIO
Utilized Ic / Part
Virtex™-5 FPGA
For Use With
HW-XGI-SCLK-G - MODULE SUPER CLOCKHW-AFX-SMA-SFP - CONVERSION MODULE SMA - SFPHW-AFX-SMA-SATA - CONVERSION MODULE SMA - SATAHW-AFX-SMA-RJ45 - CONVERSION MODULE SMA - RJ45HW-AFX-SMA-NQSL-G - NQSL NELCO QUAD SERIAL LOOPHW-AFX-SMA-HSSDC2 - CONVERSION MODULE SMA - HSSDC2HW-AFX-BERG-SDRAM - EXPANSION MOD SDRAM BERG-SDRAM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Secondary Attributes
-
Embedded
-
Primary Attributes
-
Typographical Conventions
ML52x User Guide
UG225 (v2.1) August 4, 2010
Online Document
R
This document uses the following conventions. An example illustrates each convention.
This document uses the following conventions. An example illustrates each convention.
Italic font
Underlined Text
Blue text
Red text
Blue, underlined text
Convention
Convention
References to other documents
Emphasis in text
Indicates a link to a web page.
Cross-reference link to a location
in the current document
Cross-reference link to a location
in another document
Hyperlink to a website (URL)
www.xilinx.com
Meaning or Use
Meaning or Use
See the Virtex-5 FPGA
Configuration Guide for more
information.
The address (F) is asserted after
clock event 2.
http://www.xilinx.com/virtex5
See the section
Support Resources”
Refer to
Chapter 13
See
Data Sheet
Go to
for the latest documentation.
Typographical Conventions
Figure 2
http://www.xilinx.com
“DMA Operation” in
Example
Example
for details.
in the Virtex-5 FPGA
“Additional
for details.
7