CDB5345 Cirrus Logic Inc, CDB5345 Datasheet - Page 35

EVALUATION BOARD FOR CS5345

CDB5345

Manufacturer Part Number
CDB5345
Description
EVALUATION BOARD FOR CS5345
Manufacturer
Cirrus Logic Inc
Datasheets

Specifications of CDB5345

Number Of Adc's
2
Number Of Bits
24
Sampling Rate (per Second)
192k
Data Interface
Serial
Inputs Per Adc
6 Single Ended
Power (typ) @ Conditions
400mW @ 5 V
Voltage Supply Source
Analog and Digital
Operating Temperature
-10°C ~ 70°C
Utilized Ic / Part
CS5345
Description/function
Audio A/D
Operating Supply Voltage
5 V
Product
Audio Modules
For Use With/related Products
CS5345
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Contains lead / RoHS non-compliant
Other names
598-1780
DS658F2
6.8.2
6.9
6.9.1
6.10
Reserved
Reserved
7
7
Active Level Control - Address 0Ch
Interrupt Status - Address 0Dh
For all bits in this register, a ‘1’ means the associated interrupt condition has occurred at least once since
the register was last read. A ‘0’ means the associated interrupt condition has NOT occurred since the last
reading of the register. Status bits that are masked off in the associated mask register will always be ‘0’ in
this register. This register defaults to 00h.
Analog Input Selection (Bits 2:0)
Function:
These bits are used to select the input source for the PGA and ADC. Please see
Active High/Low (Bit 0)
Function:
When this bit is set, the INT pin functions as an active high CMOS driver.
When this bit is cleared, the INT pin functions as an active low open drain driver and will require an exter-
nal pull-up resistor for proper operation.
Sel2
PGASoft
0
0
0
0
1
1
1
1
Reserved
Reserved
0
0
1
1
6
6
Sel1
0
0
1
1
0
0
1
1
Table 11. PGA Soft Cross or Zero Cross Mode Selection
Reserved
Reserved
PGAZeroCross
5
5
Sel0
0
1
0
1
Table 12. Analog Input Multiplexer Selection
0
1
0
1
0
1
0
1
Reserved
Reserved
4
4
Changes to affect immediately
Zero Cross enabled
Soft Ramp enabled
Soft Ramp and Zero Cross enabled (default)
Microphone-Level Inputs (+32 dB Gain Enabled)
Reserved
ClkErr
3
3
Line-Level Input Pair 1
Line-Level Input Pair 2
Line-Level Input Pair 3
Line-Level Input Pair 4
Line-Level Input Pair 5
Line-Level Input Pair 6
PGA/ADC Input
Reserved
Reserved
Mode
Reserved
2
2
Reserved
Table
Ovfl
1
1
12.
Active_H/L
CS5345
Undrfl
0
0
35

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