ADC14DS105KARB/NOPB National Semiconductor, ADC14DS105KARB/NOPB Datasheet - Page 23

• Manufacturer Part Number: ADC14DS105KARB/NOPB
• Description: BOARD EVAL FOR ADC14DS105KARB
• Manufacturer: National Semiconductor
• Series: PowerWise®r

Specifications of ADC14DS105KARB/NOPB

• Design Resources: ADC14DS105KARB Ref Design
• Number Of Adc's: 2
• Number Of Bits: 14
• Sampling Rate (per Second): 105M
• Data Interface: Serial
• Inputs Per Adc: 1 Differential
• Power (typ) @ Conditions: 1W @ 105MSPS
• Voltage Supply Source: Single Supply
• Operating Temperature: -40°C ~ 85°C
• Utilized Ic / Part: ADC14DS105
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: ADC14DS105KARB

SCLK: Used to register the input data (SDI) on the rising
edge; and to source the output data (SDO) on the falling edge.
User may disable clock and hold it in the low-state, as long as
clock pulse-width min spec is not violated when clock is en-
abled or disabled.
SCSb: Serial Interface Chip Select. Each assertion starts a
new register access - i.e., the SDATA field protocol is re-
quired. The user is required to deassert this signal after the
16th clock. If the SCSb is deasserted before the 16th clock,
no address or data write will occur. The rising edge captures
the address just shifted-in and, in the case of a write opera-
tion, writes the addressed register. There is a minimum pulse-
width requirement for the deasserted pulse - which is
specified in the Electrical Specifications section.
SDI: Serial Data. Must observe setup/hold requirements with
respect to the SCLK. Each cycle is 16-bits long.
FIGURE 10. Serial Interface Protocol
23
SDO: This output is normally at TRI-STATE and is driven only
when SCSb is asserted. Upon SCSb assertion, contents of
the register addressed during the first byte are shifted out with
the second 8 SCLK falling edges. Upon power-up, the default
register address is 00h.
R/Wb:
Reserved: Reserved for future use. Must be set to 0.
ADDR:
DATA:
A value of '1' indicates a read operation, while a
value of '0' indicates a write operation.
Up to 3 registers can be addressed.
In a write operation the value in this field will be
written to the register addressed in this cycle
when SCSb is deasserted. In a read operation
this field is ignored.
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