MAX1162EVKIT Maxim Integrated Products, MAX1162EVKIT Datasheet - Page 11

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MAX1162EVKIT

Manufacturer Part Number
MAX1162EVKIT
Description
EVAL KIT FOR MAX1162
Manufacturer
Maxim Integrated Products
Datasheets

Specifications of MAX1162EVKIT

Number Of Adc's
1
Number Of Bits
16
Sampling Rate (per Second)
200k
Data Interface
Serial
Inputs Per Adc
1 Single Ended
Input Range
0 ~ VREF
Power (typ) @ Conditions
12.5mW @ 200kSPS
Voltage Supply Source
Analog and Digital
Operating Temperature
0°C ~ 70°C
Utilized Ic / Part
MAX1162, MAX1062
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
The data output from the MAX1162 is binary and Figure
8 depicts the nominal transfer function. Code transitions
occur halfway between successive-integer LSB values
(V
The MAX1162 requires an external reference with a
+3.8V and AV
reference directly to REF. Bypass REF to AGND (pin 3)
with a 4.7µF capacitor. When not using a low-ESR
bypass capacitor, use a 0.1µF ceramic capacitor in
parallel with the 4.7µF capacitor. Noise on the refer-
ence degrades conversion accuracy.
The input impedance at REF is 40kΩ for DC currents.
During a conversion the external reference at REF must
deliver 100µA of DC load current and have an output
impedance of 10Ω or less.
For optimal performance, buffer the reference through
an op amp and bypass the REF input. Consider the
MAX1162’s equivalent input noise (38µV
choosing a reference.
Most applications require an input buffer amplifier to
achieve 16-bit accuracy. If the input signal is multi-
plexed, switch the input channel immediately after acqui-
sition, rather than near the end of or after a conversion
(Figure 9). This allows the maximum time for the input
buffer amplifier to respond to a large step change in the
input signal. The input amplifier must have a slew rate of
at least 2V/µs to complete the required output-voltage
change before the beginning of the acquisition time.
Figure 7. Shutdown Sequence
REF
= 4.096V and 1LSB = 63µV or 4.096V/65536).
TIMING NOT TO SCALE.
DD
DOUT
Applications Information
CS
voltage range. Connect the external
______________________________________________________________________________________
16-Bit, +5V, 200ksps ADC with 10µA
External Reference
Output Coding and
Transfer Function
CONVERSION 0
POWERED UP
Input Buffer
COMPLETE CONVERSION SEQUENCE
RMS
POWERED DOWN
) when
At the beginning of the acquisition, the internal sampling
capacitor array connects to AIN (the amplifier output),
causing some output disturbance. Ensure that the sampled
voltage has settled before the end of the acquisition time.
Digital noise can couple to AIN and REF. The conver-
sion clock (SCLK) and other digital signals active dur-
ing input acquisition contribute noise to the conversion
result. Noise signals synchronous with the sampling
interval result in an effective input offset. Asynchronous
signals produce random noise on the input, whose
high-frequency components can be aliased into the fre-
Figure 8. Unipolar Transfer Function, Full Scale (FS) = V
Zero Scale (ZS) = GND
11 . . . 111
11 . . . 110
00 . . . 011
00 . . . 010
11 . . . 101
00 . . . 001
00 . . . 000
OUTPUT CODE
0
1
2
INPUT VOLTAGE (LSB)
3
CONVERSION 1
POWERED UP
FULL-SCALE
TRANSITION
Shutdown
FS - 3/2LSB
Digital Noise
1LSB =
FS = V
FS
REF
65536
V
REF
REF
,
11

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