HW-SD1800A-DSP-SB-UNI-G Xilinx Inc, HW-SD1800A-DSP-SB-UNI-G Datasheet - Page 18

• Manufacturer Part Number: HW-SD1800A-DSP-SB-UNI-G
• Description: KIT DEVELOPMENT SPARTAN 3ADSP
• Manufacturer: Xilinx Inc
• Series: Spartan™-3A DSPr
• Type: DSPr

Specifications of HW-SD1800A-DSP-SB-UNI-G

• Contents: Development Platform, Power Supply and software
• Silicon Manufacturer: Xilinx
• Features: 10/100/1000 PHY, JTAG Programming And Configuration Port
• Silicon Family Name: Spartan-3A
• Silicon Core Number: 3SD1800A-FG676
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: Spartan 3A
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 122-1574; HW-SD1800A-DSP-DB-UNI-G; HW-SD1800A-DSP-DB-UNI-G; HW-SD1800A-DSP-SB-UNI-G

Functional Description
42
Table 8: Ethernet PHY Hardware Strapping Options
Full/Half Duplex*
Auto Negotiation
Compliant Mode
PHY address 0*
Multiple Node
Manual MDIX
Clock to MAC
Auto MDIX
Non-IEEE
Function
Speed 1*
Speed 0*
Setting
Setting
Enable
Enable
JT10: Pins 1-2
JT10: Pins 1-2
JT10: Pins 2-3
JT12: Pins 1-2
JT13: Pins 1-1
JT14: Pins 1-2
JT15: Pins 1-2
JT24: Pins 2-3
JT25: Pins 2-3
JT39: Pins 1-2
JT11: Pins 2-3
JT8: Pins 1-2
JT9: Pins 1-2
JT8: Pins 2-3
JT9: Pins 2-3
JT6: Pins 1-2
JT7: Pins 1-1
JT1: Pins 1-2
JT1: Pins 2-3
JT2: Pins 2-3
JT4: Pins 1-2
JT4: Pins 2-3
JT3: Pins 1-2
JT3: Pins 2-3
JT5: Pins 1-2
JT5: Pins 2-3
Installation
(Speed1 – 0)
(Speed0 – 0)
Jumper
www.xilinx.com
Resistor
0 Ohm
0 Ohm
0 Ohm
0 Ohm
0 Ohm
0 Ohm
0 ohm
1 K
1 K
1 K
1 K
1 K
Spartan-3A DSP Starter Platform User Guide
Speed Selection: (Auto-Neg enabled)
Speed1 Speed0
Default: 1000BASE-T, 100BASE-TX,
10BASE-T
Compliant and non-compliant operation
CLK_TO_MAC output enabled (default)
Automatic Pair Swap – MDIX (default)
Set to manual preset – Manual MDIX
1
1
0
0
Multiple node priority – switch/hub
Inhibits non-compliant operation
Auto-negation enabled (default)
CLK_TO_MAC output disabled
PHY Address 0b00001 (default)
Single node – NIC (default)
Auto-negation disabled
Straight Mode (default)
PHY Address 0b00000
Full Duplex (default)
1
0
1
0
Cross-over Mode
Mode Enabled
UG454 (v1.1) January 30, 2009
Setting (JT12)
Half Duplex
1000BASE-T, 10BASE-T
1000BASE-T, 100BASE-Tx
1000BASE-T
10BASE-T
(default)
Speed Advertised
R