P0304 Terasic Technologies Inc, P0304 Datasheet - Page 57

• Manufacturer Part Number: P0304
• Description: DE2-70 CALL FOR ACADEMIC PRICING
• Manufacturer: Terasic Technologies Inc
• Type: FPGAr

Specifications of P0304

• Contents: DE2-70 Board, Power Supply, Cables, Plastic cover and software
• For Use With/related Products: Cyclone II 2C70
• For Use With: P0033 - BOARD ADAPTER HSMC TO GPIOP0006 - BOARD ADAPTER THDB-SUMP0001 - MODULE DIGITAL CAMERA 5MP (D5M)P0307 - KIT DEV 4.3" LCD TOUCH PANEL
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: DE2-70

5.13 Implementing a TV Encoder
Although the DE2-70 board does not include a TV encoder chip, the ADV7123 (10-bit high-speed
triple ADCs) can be used to implement a professional-quality TV encoder with the digital
processing part implemented in the Cyclone II FPGA. Figure 5.19 shows a block diagram of a TV
encoder implemented in this manner.
Figure 5.19. A TV Encoder that uses the Cyclone II FPGA and the ADV7123.
TD1_RESET_N
TD2_RESET_N
TD1_CLK27
TD2_CLK27
I2C_SCLK
I2C_SDAT
TD2_D[0]
TD2_D[1]
TD2_D[2]
TD2_D[3]
TD2_D[4]
TD2_D[5]
TD2_D[6]
TD2_D[7]
TD2_HS
TD2_VS
Clock
Timing
V
U
Y
Table 5.16. TV Decoder pin assignments.
TV Encoder Block
(Cyclone II 2C70)
SIN
COS
Tables
Sync
Gen
PIN_G15
PIN_D14
PIN_C10
PIN_D15
PIN_H15
PIN_H18
PIN_E15
PIN_B10
PIN_J18
PIN_C9
PIN_A9
PIN_B9
PIN_A8
PIN_B8
PIN_A7
PIN_B7
DSP Block
(Calculate
Composite)
DSP Block
S-Video
(Y/C)
54
O (Composite)
= Y + U.cos + V.sin
or
or
C = U.cos + V.sin
(S-Video)
or
Y (S-Video)
RCA_Y
RCA_Pb
RCA_Pr
TV Decoder 1 Clock Input.
TV Decoder 2 Clock Input.
TV Decoder 2 H_SYNC
TV Decoder 2 V_SYNC
TV Decoder 2 Data[0]
TV Decoder 2 Data[1]
TV Decoder 2 Data[2]
TV Decoder 2 Data[3]
TV Decoder 2 Data[4]
TV Decoder 2 Data[5]
TV Decoder 2 Data[6]
TV Decoder 2 Data[7]
TV Decoder 1 Reset
TV Decoder 2 Reset
I2C Clock
I2C Data
10-bit
10-bit
10-bit
10-bit VGA DAC
DAC
DAC
DAC
DE2-70 User Manual