C8051F120-TB Silicon Laboratories Inc, C8051F120-TB Datasheet - Page 349
C8051F120-TB
Manufacturer Part Number
C8051F120-TB
Description
BOARD PROTOTYPING W/C8051F120
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Specifications of C8051F120-TB
Contents
Board
Processor To Be Evaluated
C8051F12x and C8051F13x
Interface Type
USB
Silicon Manufacturer
Silicon Labs
Core Architecture
8051
Silicon Core Number
C8051F120
Silicon Family Name
C8051F12x
Kit Contents
Board
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
C8051F120
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
C8051F120-TB
Manufacturer:
Silicon Labs
Quantity:
135
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Revision 1.3 to Revision 1.4
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OCUMENT
Added new paragraph tags: SFR Definition and JTAG Register Definition.
Product Selection Guide Table 1.1: Added RoHS-compliant ordering information.
Overview Chapter, Figure 1.8, “On-Chip Memory Map”: Corrected on-chip XRAM size to “8192 Bytes”.
SAR8 Chapter: Table 7.1, “ADC2 Electrical Characteristics”: Track/Hold minimum spec corrected to
“300 ns”.
SAR8 Chapter: Table 7.1, “ADC2 Electrical Characteristics”: Total Harmonic Distortion typical spec
corrected to “-51 dB”.
Oscillators Chapter, Figure 14.1, “Oscillator Diagram”: Corrected location of IOSCEN arrow.
CIP51 Chapter,
cycle instruction.
CIP51 Chapter, Interrupt Summary Table: Added “SFRPAGE” column and SFRPAGE value for each
interrupt source.
CIP-51 Chapter, Figure 11.2, “Memory Map”: Corrected on-chip XRAM size to “8192 Bytes”.
Port I/O Chapter, Crossbar Priority Figures: Character formatting problem corrected.
Port I/O Chapter, P7MDOUT Register Description: Removed references to UART and SMBus periph-
erals.
Port I/O Chapter, P3MDOUT Register Description: Corrected text to read “P3MDOUT.[7:0]”.
Timers Chapter: References to “TnCON” corrected to read “TMRnCN”.
PCA0 Chapter, Section 24.1: Added note about PCA0CN Register and effects of read-modify-write
instructions on the CF bit.
C
Section 11.3
HANGE
L
: Added note describing EA change behavior when followed by single-
IST
Rev. 1.4
C8051F120/1/2/3/4/5/6/7
C8051F130/1/2/3
349
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