C8051F120-TB Silicon Laboratories Inc, C8051F120-TB Datasheet - Page 78

• Manufacturer Part Number: C8051F120-TB
• Description: BOARD PROTOTYPING W/C8051F120
• Manufacturer: Silicon Laboratories Inc
• Type: MCUr

Specifications of C8051F120-TB

• Contents: Board
• Processor To Be Evaluated: C8051F12x and C8051F13x
• Interface Type: USB
• Silicon Manufacturer: Silicon Labs
• Core Architecture: 8051
• Silicon Core Number: C8051F120
• Silicon Family Name: C8051F12x
• Kit Contents: Board
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With/related Products: C8051F120
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

C8051F120/1/2/3/4/5/6/7
C8051F130/1/2/3
78
Bits7–4: UNUSED. Read = 0000b; Write = don’t care.
Bit3:
Bit2:
Bit1:
Bit0:
SFR Page:
SFR Address:
Note: The ADC0 Data Word is in 2’s complement format for channels configured as differential.
R/W
Bit7
-
AIN67IC: AIN0.6, AIN0.7 Input Pair Configuration Bit.
0: AIN0.6 and AIN0.7 are independent single-ended inputs.
1: AIN0.6, AIN0.7 are (respectively) +, - differential input pair.
AIN45IC: AIN0.4, AIN0.5 Input Pair Configuration Bit.
0: AIN0.4 and AIN0.5 are independent single-ended inputs.
1: AIN0.4, AIN0.5 are (respectively) +, - differential input pair.
AIN23IC: AIN0.2, AIN0.3 Input Pair Configuration Bit.
0: AIN0.2 and AIN0.3 are independent single-ended inputs.
1: AIN0.2, AIN0.3 are (respectively) +, - differential input pair.
AIN01IC: AIN0.0, AIN0.1 Input Pair Configuration Bit.
0: AIN0.0 and AIN0.1 are independent single-ended inputs.
1: AIN0.0, AIN0.1 are (respectively) +, - differential input pair.
0
0xBA
R/W
Bit6
-
SFR Definition 6.1. AMX0CF: AMUX0 Configuration
R/W
Bit5
-
R/W
Bit4
-
Rev. 1.4
AIN67IC
R/W
Bit3
AIN45IC
R/W
Bit2
AIN23IC
R/W
Bit1
AIN01IC 00000000
R/W
Bit0
Reset Value