C8051F410-TB Silicon Laboratories Inc, C8051F410-TB Datasheet - Page 179

• Manufacturer Part Number: C8051F410-TB
• Description: BOARD PROTOTYPING W/C8051F410
• Manufacturer: Silicon Laboratories Inc
• Type: MCUr

Specifications of C8051F410-TB

• Contents: Board
• Processor To Be Evaluated: C8051F41x
• Interface Type: USB
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With/related Products: C8051F410
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

ning of each series of consecutive reads. Software must check if the smaRTClock Interface is busy prior to
reading RTC0DAT. Autoread is enabled by setting AUTORD (RTC0ADR.6) to logic 1.
20.1.4. RTC0ADR Autoincrement Feature
For ease of reading and writing the 48-bit CAPTURE and ALARM values, RTC0ADR automatically incre-
ments after each read or write to a CAPTUREn or ALARMn register. This speeds up the process of setting
an alarm or reading the current smaRTClock timer value.
smaRTClock
0x00 - 0x05
0x08–0x0D
Address
0x0E
0x06
0x07
0x0F
smaRTClock
CAPTUREn smaRTClock Capture
RAMADDR
RAMDATA
RTC0XCN
Register
RTC0CN
ALARMn
Table 20.1. smaRTClock Internal Registers
Registers
smaRTClock Control
Register
smaRTClock Oscillator
Control Register
smaRTClock Alarm
Registers
smaRTClock Backup RAM
Indirect Address Register
smaRTClock Backup RAM
Indirect Data Register
Register Name
Rev. 1.1
Six Registers used for setting the 47-bit
smaRTClock timer or reading its current
value. The LSB of CAPTURE0 is not used.
Controls the operation of the smaRTClock
State Machine.
Controls the operation of the smaRTClock
Oscillator.
Six registers used to set or read the 47-bit
smaRTClock alarm value. The LSB of
ALARM0 is not used.
Used as an index to the 64 byte smaRTClock
backup RAM.
Used to read or write the byte pointed to by
RAMADDR.
C8051F410/1/2/3
Description
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