C8051F410-TB Silicon Laboratories Inc, C8051F410-TB Datasheet - Page 200
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C8051F410-TB
Manufacturer Part Number
C8051F410-TB
Description
BOARD PROTOTYPING W/C8051F410
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Specifications of C8051F410-TB
Contents
Board
Processor To Be Evaluated
C8051F41x
Interface Type
USB
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
C8051F410
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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C8051F410/1/2/3
200
ARBLOST
TXMODE
MASTER
ACKRQ
STO
ACK
STA
Bit
SI
• A START is generated.
• START is generated.
• SMB0DAT is written before the start of an
• A START followed by an address byte is
• A STOP is detected while addressed as a
• Arbitration is lost due to a detected STOP.
• A byte has been received and an ACK
• A repeated START is detected as a MASTER
• SCL is sensed low while attempting to gener-
• SDA is sensed low while transmitting a ‘1’
• The incoming ACK value is low (ACKNOWL-
• A START has been generated.
• Lost arbitration.
• A byte has been transmitted and an
• A byte has been received.
• A START or repeated START followed by a
• A STOP has been received.
Table 21.3. Sources for Hardware Changes to SMB0CN
SMBus frame.
received.
slave.
response value is needed.
when STA is low (unwanted repeated START).
ate a STOP or repeated START condition.
(excluding ACK bits).
EDGE).
ACK/NACK received.
slave address + R/W has been received.
Set by Hardware When:
Rev. 1.1
• A STOP is generated.
• Arbitration is lost.
• A START is detected.
• Arbitration is lost.
• SMB0DAT is not written before the
• Must be cleared by software.
• A pending STOP is generated.
• If STO is set by hardware, it must be
• After each ACK cycle.
• Each time SI is cleared.
• The incoming ACK value is high (NOT
• Must be cleared by software.
start of an SMBus frame.
cleared by software.
ACKNOWLEDGE).
Cleared by Hardware When:
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