DEMO56F8014-EE Freescale Semiconductor, DEMO56F8014-EE Datasheet - Page 57

• Manufacturer Part Number: DEMO56F8014-EE
• Description: BOARD DEMO FOR 56F8014
• Manufacturer: Freescale Semiconductor
• Type: MCUr

Specifications of DEMO56F8014-EE

• Contents: *
• Processor To Be Evaluated: MC56F8014
• Data Bus Width: 16 bit
• Interface Type: RS-232
• For Use With/related Products: 56F8014
• For Use With: APMOTOR56F8000E - KIT DEMO MOTOR CTRL SYSTEM
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

5.5.8
5.5.8.1
The lower 16 bits of the vector address used for Fast Interrupt 0. This register is combined with FIVAH0
to form the 21-bit vector address for Fast Interrupt 0 defined in the FIM0 register.
5.5.9
5.5.9.1
This bit field is reserved or not implemented. It is read as 0 and cannot be modified by writing.
5.5.9.2
The upper five bits of the vector address used for Fast Interrupt 0. This register is combined with FIVAL0
to form the 21-bit vector address for Fast Interrupt 0 defined in the FIM0 register.
5.5.10
5.5.10.1
This bit field is reserved or not implemented. It is read as 0 and cannot be modified by writing.
5.5.10.2
These values determine which IRQ will be Fast Interrupt 1. Fast Interrupts vector directly to a service
routine based on values in the Fast Interrupt Vector Address registers without having to go to a jump table
first. IRQs used as Fast Interrupts must be set to priority level 2. Unexpected results will occur if a Fast
Freescale Semiconductor
Base + $7
Base + $8
Base + $9
RESET
RESET
RESET
Write
Write
Write
Read
Read
Read
Fast Interrupt 0 Vector Address Low Register (FIVAL0)
Fast Interrupt 0 Vector Address High Register (FIVAH0)
Fast Interrupt 1 Match Register (FIM1)
Fast Interrupt 0 Vector Address Low (FIVAL0)—Bits 15—0
Figure 5-11 Fast Interrupt 0 Vector Address High Register (FIVAH0)
Reserved—Bits 15–5
Fast Interrupt 0 Vector Address High (FIVAH0)—Bits 4–0
Reserved—Bits 15–6
Fast Interrupt 1 Vector Number (FAST INTERRUPT 1)—Bits 5–0
Figure 5-10 Fast Interrupt 0 Vector Address Low Register (FIVAL0)
15
15
15
0
0
0
0
0
Figure 5-12 Fast Interrupt 1 Match Register (FIM1)
14
14
14
0
0
0
0
0
13
13
13
0
0
0
0
0
12
12
12
0
0
0
0
0
56F8014 Technical Data, Rev. 11
11
11
11
0
0
0
0
0
FAST INTERRUPT 0 VECTOR ADDRESS LOW
10
10
10
0
0
0
0
0
9
0
9
0
0
9
0
0
8
0
8
0
0
8
0
0
7
7
7
0
0
0
0
0
6
6
6
0
0
0
0
0
5
0
5
0
0
5
0
4
4
4
0
0
0
FAST INTERRUPT 0 VECTOR
FAST INTERRUPT 1
3
3
3
0
0
0
ADDRESS HIGH
2
0
2
0
2
0
Register Descriptions
1
0
1
0
1
0
0
0
0
0
0
0
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