DEMO56F8014-EE Freescale Semiconductor, DEMO56F8014-EE Datasheet - Page 61

• Manufacturer Part Number: DEMO56F8014-EE
• Description: BOARD DEMO FOR 56F8014
• Manufacturer: Freescale Semiconductor
• Type: MCUr

Specifications of DEMO56F8014-EE

• Contents: *
• Processor To Be Evaluated: MC56F8014
• Data Bus Width: 16 bit
• Interface Type: RS-232
• For Use With/related Products: 56F8014
• For Use With: APMOTOR56F8000E - KIT DEMO MOTOR CTRL SYSTEM
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

5.5.16.5
This bit field is reserved or not implemented. It is read as 1 and cannot be modified by writing.
5.5.16.6
This bit field is reserved or not implemented. It is read as 0 and cannot be modified by writing.
5.6 Resets
5.6.1
5.6.2
5.6.2.1
The ITCN provides the 56800E core with a reset vector address on the VAB pins whenever RESET is
asserted from the SIM. The reset vector will be presented until the second rising clock edge after RESET
is released. The general timing is shown in
5.6.3
After reset, all of the ITCN registers are in their default states. This means all interrupts are disabled,
except the core IRQs with fixed priorities:
Freescale Semiconductor
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Illegal Instruction
SW Interrupt 3
HW Stack Overflow
Misaligned Long Word Access
SW Interrupt 2
SW Interrupt 1
RES
CLK
General
Description of Reset Operation
VAB
PAB
ITCN After Reset
Core Reset
Reserved—Bits 4–2
Reserved—Bits 1–0
Reset Handshake Timing
Reset
Priority
Figure 5-19 Reset Interface
Table 5-4 Reset Summary
56F8014 Technical Data, Rev. 11
Figure 5-19
RESET_VECTOR_ADR
Source
RST
.
Core reset from the SIM
Characteristics
READ_ADR
Resets
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