DEMO56F8014-EE Freescale Semiconductor, DEMO56F8014-EE Datasheet - Page 72

BOARD DEMO FOR 56F8014

DEMO56F8014-EE

Manufacturer Part Number
DEMO56F8014-EE
Description
BOARD DEMO FOR 56F8014
Manufacturer
Freescale Semiconductor
Type
MCUr

Specifications of DEMO56F8014-EE

Contents
*
Processor To Be Evaluated
MC56F8014
Data Bus Width
16 bit
Interface Type
RS-232
For Use With/related Products
56F8014
For Use With
APMOTOR56F8000E - KIT DEMO MOTOR CTRL SYSTEM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Note: This bit should only be changed while the Quad Timer module’s clock is disabled. See
6.3.9.
Note: High-speed clocking is only available when the PLL is being used.
Note: If the PWM sync signal is used as input to Timer 3 (See SIM_CTRL: TC3_INP,
then the clocks of the Quad Timer and PWM must be related, as shown in
6.3.8.2
This bit selects the clock speed for the PWM module.
Note: This bit should only be changed while the
Note: High-speed clocking is only available when the PLL is being used.
Note: If the PWM sync signal is used as input to Timer 3 (See SIM_CTRL: TC3_INP,
then the clocks of the Quad Timer and PWM must be related, as shown in
6.3.8.3
This bit field is reserved or not implemented. It is read as 0 and cannot be modified by writing.
6.3.8.4
This bit selects the alternate function for GPIOB7.
6.3.8.5
This bit selects the alternate function for GPIOB6.
Note: The PRECS bit in the OCCS Oscillator Control register can enable this pin as the
72
0 = PWM module clock rate equals system clock rate, to a maximum 32 MHz (default)
1 = PWM module clock rate equals three times system clock rate, to a maximum 96 MHz
0 = TXD — SCI Transmit Data (default)
1 = SCL — I
0 = RXD — SCI Receive Data (default)
1 = SDA — I
PWM Clock Rate (PCR)—Bit 14
Reserved—Bits 13–12
Configure GPIOB7 (CFG_B7)—Bit 11
Configure GPIOB6 (CFG_B6)—Bit 10
2
2
Table 6-2 Allowable Quad Timer and PWM Clock Rates
C Serial Clock
C Serial Data
PWM
when Using PWM Reload Pulse
56F8014 Technical Data, Rev. 11
Clock Speed
1X
3X
PWM
module’s clock is disabled. See
OK
NO
1X
Quad Timer
OK
OK
3X
Table
Table
6-2.
6-2.
Freescale Semiconductor
Section
Section
Section
6.3.9.
6.3.1.7),
6.3.1.7),
Section

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