E62655RUSB Renesas Electronics America, E62655RUSB Datasheet - Page 17

• Manufacturer Part Number: E62655RUSB
• Description: EMULATOR BASE H8S/2655R W/USB
• Manufacturer: Renesas Electronics America
• Type: Microcontrollerr

Specifications of E62655RUSB

• Contents: E6000 Emulator Unit and 4 Logic Probes
• For Use With/related Products: H8S/2655R
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Section 5 Interrupt Controller
5.1
5.2
5.3
5.4
5.5
5.6
Section 6 Bus Controller
6.1
Overview........................................................................................................................... 93
5.1.1
5.1.2
5.1.3
5.1.4
Register Descriptions ........................................................................................................ 96
5.2.1
5.2.2
5.2.3
5.2.4
5.2.5
5.2.6
Interrupt Sources............................................................................................................... 102
5.3.1
5.3.2
5.3.3
Interrupt Operation............................................................................................................ 108
5.4.1
5.4.2
5.4.3
5.4.4
5.4.5
5.4.6
5.4.7
Usage Notes ...................................................................................................................... 124
5.5.1
5.5.2
5.5.3
5.5.4
DTC and DMAC Activation by Interrupt ......................................................................... 126
5.6.1
5.6.2
5.6.3
Overview........................................................................................................................... 129
6.1.1
6.1.2
6.1.3
6.1.4
Features................................................................................................................ 93
Block Diagram ..................................................................................................... 94
Pin Configuration................................................................................................. 94
Register Configuration......................................................................................... 95
System Control Register (SYSCR) ...................................................................... 96
Interrupt Control Registers A to C (ICRA to ICRC)............................................ 97
Interrupt Priority Registers A to K (IPRA to IPRK) ............................................ 97
IRQ Enable Register (IER) .................................................................................. 99
IRQ Sense Control Registers H and L (ISCRH, ISCRL)..................................... 99
IRQ Status Register (ISR).................................................................................... 100
External Interrupts ............................................................................................... 102
Internal Interrupts................................................................................................. 104
Interrupt Exception Handling Vector Table......................................................... 104
Interrupt Control Modes and Interrupt Operation ................................................ 108
Interrupt Control Mode 0 ..................................................................................... 112
Interrupt Control Mode 1 ..................................................................................... 114
Interrupt Control Mode 2 ..................................................................................... 117
Interrupt Control Mode 3 ..................................................................................... 119
Interrupt Exception Handling Sequence .............................................................. 121
Interrupt Response Times .................................................................................... 123
Contention between Interrupt Generation and Disabling..................................... 124
Instructions That Disable Interrupts..................................................................... 125
Times when Interrupts Are Disabled ................................................................... 125
Interrupts during Execution of EEPMOV Instruction.......................................... 125
Overview.............................................................................................................. 126
Block Diagram ..................................................................................................... 126
Operation ............................................................................................................. 127
Features................................................................................................................ 129
Block Diagram ..................................................................................................... 131
Pin Configuration................................................................................................. 132
Register Configuration......................................................................................... 134
................................................................................................... 129
.......................................................................................... 93
Rev. 5.00 Sep 14, 2006 page xv of xxviii