E62655RUSB Renesas Electronics America, E62655RUSB Datasheet - Page 82

• Manufacturer Part Number: E62655RUSB
• Description: EMULATOR BASE H8S/2655R W/USB
• Manufacturer: Renesas Electronics America
• Type: Microcontrollerr

Specifications of E62655RUSB

• Contents: E6000 Emulator Unit and 4 Logic Probes
• For Use With/related Products: H8S/2655R
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Section 2 CPU
Type
Block data
transfer
instruction
2.6.4
The H8S/2655 Group instructions consist of 2-byte (1-word) units. An instruction consists of an
operation field (op field), a register field (r field), an effective address extension (EA field), and a
condition field (cc).
(1) Operation Field
(2) Register Field
(3) Effective Address Extension
(4) Condition Field
Figure 2.12 shows examples of instruction formats.
Rev. 5.00 Sep 14, 2006 page 52 of 1060
REJ09B0331-0500
Indicates the function of the instruction, the addressing mode, and the operation to be carried
out on the operand. The operation field always includes the first four bits of the instruction.
Some instructions have two operation fields.
Specifies a general register. Address registers are specified by 3 bits, data registers by 3 bits or
4 bits. Some instructions have two register fields. Some have no register field.
Eight, 16, or 32 bits specifying immediate data, an absolute address, or a displacement.
Specifies the branching condition of Bcc instructions.
Basic Instruction Formats
Instruction
EEPMOV.B
EEPMOV.W
Size *
—
—
Function
if R4L
else next;
if R4
else next;
Transfers a data block according to parameters set in
general registers R4L or R4, ER5, and ER6.
R4L or R4: size of block (bytes)
ER5: starting source address
ER6: starting destination address
Execution of the next instruction begins as soon as the
transfer is completed.
Repeat @ER5+
Until R4L = 0
Repeat @ER5+
Until R4 = 0
0 then
R4L–1
R4–1
0 then
R4
R4L
@ER6+
@ER6+