AD9875-EB Analog Devices Inc, AD9875-EB Datasheet - Page 4

• Manufacturer Part Number: AD9875-EB
• Description: BOARD EVAL FOR AD9875
• Manufacturer: Analog Devices Inc

Specifications of AD9875-EB

• Rohs Status: RoHS non-compliant
• Module/board Type: Evaluation Board
• For Use With/related Products: AD9875
• Lead Free Status / Rohs Status: Not Compliant

AD9875
Parameter
Tx PATH INTERFACE
Rx PATH INTERFACE
CMOS LOGIC INPUTS
CMOS LOGIC OUTPUTS (1 mA Load)
POWER SUPPLY
SERIAL CONTROL BUS
RECEIVE-TO-TRANSMIT ISOLATION
VOLTAGE REGULATOR CONTROLLER
Specifications subject to change without notice.
Maximum Input Nibble Rate, 2× Interpolation
Tx-Set Up Time (t
Tx-Hold Time (t
Maximum Output Nibble Rate
Rx-DataValid Time (t
Rx-Data Hold Time (t
Logic “1” Voltage
Logic “0” Voltage
Logic “1” Current
Logic “0” Current
Input Capacitance
Logic “1” Voltage
Logic “0” Voltage
Digital Output Rise/Fall Time
All Blocks Powered Up
Power Consumption of Functional Blocks
All Blocks Powered Down
Power Supply Rejection
Maximum SCLK Frequency (f
Clock Pulsewidth High (t
Clock Pulsewidth Low (t
Clock Rise/Fall Time
Data/Chip-Select Setup Time (t
Data Hold Time (t
Data Valid Time (t
(10 MHz, Full-Scale Sinewave Output/Output)
Isolation: Tx Path to Rx Path, Gain = +36 dB
Isolation: Rx Path to Tx Path, Gain = –6 dB
Output Voltage (V
Line Regulation (∆V
Load Regulation (∆V
Maximum Load Current (I
I
I
Digital Supply Current (I
Analog Supply Current (I
Rx LPF
ADC and FPGA
Rx Reference
Interpolator
DAC
PLL-B
PLL-A
Voltage Regulator Controller
Supply Current I
Supply Current I
Tx Path (∆V
Rx Path (∆V
S_TOTAL
S_TOTAL
–SPECIFICATIONS
(Total Supply Current)
(Tx_QUIET Pin Asserted)
S
S
=
=
HD
FB
SU
DH
DV
S
S
)
, f
, f
10%)
10%)
FB%
)
FB
with SI2301 Connected)
)
)
VT
OSCIN
OSCIN
HT
/∆I
/∆V
)
PWL
)
PWH
LOAD
LOAD
DRVDD
DVDD%
AVDD
= 32 MHz
Idle
)
)
)
SCLK
)
DS
)
+ I
)
× 100%)
)
DVDD
(continued)
)
Temp
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
25°C
Full
Full
Full
Full
25°C
25°C
25°C
25°C
25°C
25°C
25°C
25°C
25°C
25°C
25°C
Full
Full
25°C
25°C
Full
Full
Full
Full
Full
Full
Full
25°C
25°C
Full
25°C
25°C
Full
–4–
Test
Level
II
II
II
I
II
II
II
II
II
II
III
II
II
II
I
III
III
III
III
III
III
III
III
III
III
III
II
II
III
III
II
II
II
II
II
II
II
III
III
I
III
III
II
Min
128
3.0
0
110
1.5
V
V
1.5
25
18
18
25
0
1.25
250
DRVDD
DRVDD
– 0.7
– 0.6
Typ
3
172
77
185
110
55
2
33
18
8
24
1
19
10
62
54
–75
–70
100
60
262
1.30
Max
3.0
0.4
12
12
0.4
2.5
288
22
12
1
20
1.35
Unit
MHz
ns
ns
MHz
ns
ns
V
V
µA
µA
µF
V
V
ns
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
dB
dB
MHz
ns
ns
ms
ns
ns
ns
dB
dB
V
%
mΩ
mA
REV. A