AD9380/PCB Analog Devices Inc, AD9380/PCB Datasheet - Page 17

• Manufacturer Part Number: AD9380/PCB
• Description: BOARD EVALUATION FOR AD9380
• Manufacturer: Analog Devices Inc

Specifications of AD9380/PCB

• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Sync Processing
The inputs of the AD9380 sync processing section are
combinations of digital HSYNCs and VSYNCs, analog sync-on-
green signal, sync-on-Y signal, and an optional external coast
signal. From these signals, the AD9380 generates a precise,
jitter-free (9% or less at 95 MHz) clock from its PLL; an
odd/even field signal; HSYNC and VSYNC out signals; a count
of HSYNCs per VSYNC; and a programmable SOG output. The
main sync processing blocks are the sync slicer, sync separator,
HSYNC filter, HSYNC regenerator, VSYNC filter, and coast
generator.
The sync slicer extracts the sync signal from the green graphics
or luminance video signal that is connected to the SOGIN input
and outputs a digital composite sync. The sync separator’s task
HSYNC 0
HSYNC 1
VSYNC 0
VSYNC 1
SOGIN 0
SOGIN 1
COAST
1
2
3
4
5
ACTIVITY DETECT
POLARITY DETECT
REGENERATED HSYNC
FILTERED HSYNC
SET POLARITY
AD
AD
AD
AD
1
1
1
1
SLICER
SLICER
SYNC
SYNC
AD9380
PD
PD
AD
AD
PD
PD
2
2
1
1
2
2
FILTER COAST VSYNC
MUX
MUX
MUX
0x12:0
CHANNEL
SELECT
VSYNC
Figure 8. Sync Processing Block Diagram
[0x11:3]
VSYNC FILTER
PROCESSOR
Rev. 0 | Page 17 of 60
SYNC
AND
COAST SELECT
0x12:1
SP SYNC FILTER EN
MUX
HSYNC
SELECT
PLL SYNC FILTER EN
MUX
0x21:7
COAST
is to extract VSYNC from the composite sync signal, which can
come from either the sync slicer or the HSYNC input. The
HSYNC filter is used to eliminate any extraneous pulses from
the HSYNC or SOGIN inputs, outputting a clean, low jitter
signal that is appropriate for mode detection and clock
generation. The HSYNC regenerator is used to recreate a clean,
although not low jitter, HSYNC signal that can be used for
mode detection and for counting HSYNCs per VSYNC. The
VSYNC filter is used to eliminate spurious VSYNCs, maintain a
stable timing relationship between the VSYNC and HSYNC
output signals, and generate the odd/even field output. The
coast generator creates a robust coast signal that allows the PLL
to maintain its frequency in the absence of HSYNC pulses.
0x21:6
[0x11:7]
MUX
HSYNC
GENERATOR
PLL CLOCK
MUX
FH
4
REGENERATOR
HSYNC FILTER
HSYNC/VSYNC
AND
REG 26H, 27H
COUNTER
SOGOUT SELECT
RH
FILTERED
0x24:2,1
VSYNC
3
MUX
VSYNC
VSYNC FILTER EN
SP
SP
5
0x21:5
5
SP
MUX
SP
5
5
SOGOUT
VSOUT
O/E
FIELD
HSOUT
DATACK
AD9380