HS7750KCI01H Renesas Electronics America, HS7750KCI01H Datasheet - Page 220

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HS7750KCI01H

Manufacturer Part Number
HS7750KCI01H
Description
ON CHIP DEBUG EMULATOR
Manufacturer
Renesas Electronics America
Datasheets

Specifications of HS7750KCI01H

Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
11. An address (physical address) to which a BREAKPOINT is set is determined when the
12. When a BREAKPOINT is set to the cacheable area, the cache block containing the
13. While a BREAKPOINT is set, the contents of the instruction cache are disabled at execution
6.5.4
Set the JTAG clock (TCK) frequency to lower than the frequency of half of the SH7750 or
SH7750S peripheral module clock (CKP). Do not set the frequency as 16.5 MHz or more.
Note: The SH7750 E10A emulator does not support the AUD function.
6.5.5
The SH7750 E10A emulator does not support the AUD function. Table 6.7 shows the emulator
type number and AUD function.
Table 6.7
Type Number
HS7750KCM01H
HS7750KCI01H
Rev. 2.0, 01/01, page 196 of 214
If a program is executed again without clearing the BREAKPOINT set at the address in which
the TLB error occurs, a TLB error will occur again. Accordingly, clear the BREAKPOINT
before execution.
BREAKPOINT is set. Accordingly, even if the VP_MAP table is modified after
BREAKPOINT setting, the BREAKPOINT address remains unchanged. When a
BREAKPOINT is satisfied with the modified address in the VP_MAP table, the cause of
termination displayed in the status bar and the [System Status] window is ILLEGAL
INSTRUCTION, not BREAKPOINT.
BREAKPOINT address is filled immediately before and after user program execution.
completion.
Notes on Using the JTAG Clock (TCK)
Trace Functions
Type Number and AUD Function
Figure 6.4 Message Box for Clearing a TLB-Error
AUD Function
Not supported
Not supported

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