HS7751RKCM01H Renesas Electronics America, HS7751RKCM01H Datasheet - Page 245

• Manufacturer Part Number: HS7751RKCM01H
• Description: ON CHIP DEBUG EMULATOR W/TRACE
• Manufacturer: Renesas Electronics America

Specifications of HS7751RKCM01H

• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Table 6.12 Measurement Conditions
Measurement Condition Mode
Operand access count
Internal I/O access count
Cache miss count
TLB miss count
Instruction fetch count
Branch count
Measurement condition
Operand access count, internal I/O access count, cache miss count, TLB miss count, branch
count, instruction execution count, interrupt count, cache fill count, and elapsed cycle
count can be measured. Table 6.12 lists the measurement conditions.
OAR*
OAW*
OARW*
OARAM
OA
IOA
DCR
DCW
DCRW
EC
DT
ET
EF*
EA
B
BT
BBJ
Description
The number of times the operand access is performed on
the cacheable area when the cache is enabled (read
access only).
The number of times the operand access is performed on
the cacheable area when the cache is enabled (write
access only).
The number of times the operand access is performed on
the cacheable area when the cache is enabled (both read
and write accesses).
The number of times the internal RAM area is accessed.
The number of all operand accesses.
The number of times the internal I/O is accessed.
The number of times operand cache misses occur at data
reading.
The number of times operand cache misses occur at data
writing.
The number of times operand cache misses occur at data
reading or writing.
The number of times instruction cache misses.
The number of times UTLB misses occur at data access.
The number of times UTLB and ITLB misses occur at
instruction access.
The number of times instructions are fetched from the
cacheable area when the cache is enabled.
The number of times all instructions are fetched.
The number of times branch instructions are issued
(instructions to be counted: BF (other than displacement 0),
BF/S, BT (other than displacement 0), BT/S, BRA, BRAF,
JMP).
The number of times branches are taken (branches to be
counted are the same as mode B).
The number of times BSR, BSRF, and JSR instructions are
issued.
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