PPC8544EVTANG Freescale Semiconductor, PPC8544EVTANG Datasheet - Page 96
![no-image](/images/manufacturer_photos/0/2/262/freescale_semiconductor_sml.jpg)
PPC8544EVTANG
Manufacturer Part Number
PPC8544EVTANG
Description
EVAL MPC8544 783FCPBGA
Manufacturer
Freescale Semiconductor
Type
Microcontrollerr
Datasheet
1.MPC8544VTALF.pdf
(117 pages)
Specifications of PPC8544EVTANG
Contents
Board
For Use With/related Products
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
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Part Number
Manufacturer
Quantity
Price
Part Number:
PPC8544EVTANG
Manufacturer:
FREESCALE
Quantity:
20 000
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Thermal
19.6.2
Please note the following FIFO maximum speed restrictions based on platform speed. Refer to
“Platform to FIFO Restrictions,”
20 Thermal
This section describes the thermal specifications of the MPC8544E.
20.1
Table 70
96
Note:
1. FIFO speed should be less than 24% of the platform speed.
Junction-to-ambient natural convection
Junction-to-ambient natural convection
Junction-to-ambient (@200 ft/min)
Junction-to-ambient (@200 ft/min)
Junction-to-board thermal
Junction-to-case thermal
Notes:
1. Junction temperature is a function of die size, on-chip power dissipation, package thermal resistance, mounting site (board)
2. Per JEDEC JESD51-2 and JESD51-6 with the board (JESD51-9) horizontal.
3. Thermal resistance between the die and the printed-circuit board per JEDEC JESD51-8. Board temperature is measured on
4. Thermal resistance between the active surface of the die and the case top surface determined by the cold plate method (MIL
SPEC-883 Method 1012.1) with the calculated case temperature. Actual thermal resistance is less than 0.1°C/W.
temperature, ambient temperature, airflow, power dissipation of other components on the board, and board thermal
resistance.
the top surface of the board near the package.
Platform Speed (MHz)
provides the package thermal characteristics.
Thermal Characteristics
Platform to FIFO Restrictions
Characteristic
533
400
MPC8544E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 5
Table 69. FIFO Maximum Speed Restrictions
Table 70. Package Thermal Characteristics
for additional information.
Maximum FIFO Speed for Reference Clocks TSECn_TX_CLK, TSECn_RX_CLK
Four layer board (2s2p)
Four layer board (2s2p)
Single layer board (1s)
Single layer board (1s)
JEDEC Board
—
—
(MHz)
Symbol
126
94
R
R
R
R
R
R
θJA
θJA
θJA
θJA
θJB
θJC
1
Value
<0.1
26
21
21
17
12
Freescale Semiconductor
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
Unit
Section 4.4,
Notes
1, 2
1, 2
1, 2
1, 2
3
4
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