74aup1g132 NXP Semiconductors, 74aup1g132 Datasheet
74aup1g132
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74aup1g132 Summary of contents
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... The I OFF the device when it is powered down. The 74AUP1G132 provides the single 2-input NAND Schmitt trigger function which accept standard input signals. They are capable of transforming slowly changing input signals into sharply defined, jitter-free output signals. The inputs switch at different points for positive and negative-going signals. The difference ...
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... GND Y 001aac531 Fig 4. Pin configuration SOT353-1 (TSSOP5) 74AUP1G132_1 Product data sheet Low-power 2-input NAND Schmitt trigger Description TSSOP5 plastic thin shrink small outline package; 5 leads; body width 1.25 mm XSON6 plastic extremely thin small outline package; no leads; 6 terminals; body 1 XSON6 plastic extremely thin small outline package ...
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... < Active mode and Power-down mode +125 C amb derates linearly with 4.0 mW/K. tot derates linearly with 2.4 mW/K. tot Rev. 01 — 20 October 2006 74AUP1G132 Low-power 2-input NAND Schmitt trigger Output Min Max 0.5 +4 [1] 0.5 +4.6 - ...
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... GND 3 GND Rev. 01 — 20 October 2006 74AUP1G132 Low-power 2-input NAND Schmitt trigger Min Max 0.8 3 3.6 40 +125 Min Typ Max ...
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... 1 1 2 3 2 4 Rev. 01 — 20 October 2006 74AUP1G132 Low-power 2-input NAND Schmitt trigger Min Typ Max ...
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... GND GND. CC Rev. 01 — 20 October 2006 74AUP1G132 Low-power 2-input NAND Schmitt trigger Min Typ Max - - 0.50 ...
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... [2] Figure Rev. 01 — 20 October 2006 74AUP1G132 Low-power 2-input NAND Schmitt trigger +125 C [1] Min Typ Max Min Max ( 22 2.6 6.3 13.4 2.4 15.1 2.2 4.6 8.2 1.9 1.9 3 ...
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... input M GND t PHL output Table 9. Input 0 Rev. 01 — 20 October 2006 74AUP1G132 Low-power 2-input NAND Schmitt trigger +125 C [1] Typ Max Min Max ( 3.2 - ...
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... V I PULSE DUT GENERATOR [ open = for measuring propagation delays, setup and hold times and pulse width R L Rev. 01 — 20 October 2006 74AUP1G132 Low-power 2-input NAND Schmitt trigger V EXT 001aac521 of the pulse generator. o EXT , t ...
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... CC = 1 1. 2 3 see Figure 9, T 10, Figure 11 and = 0 1 1 1. 2 3 mna207 Fig 10. Definition of V Rev. 01 — 20 October 2006 74AUP1G132 Low-power 2-input NAND Schmitt trigger +125 C Typ Max Min Max ( 0.60 0.30 0.60 - 0.90 0.53 0.90 - 1.11 0.74 1.11 - 1.29 0.91 1.29 - 1.77 1.37 1.77 - 2.29 1.88 2.29 - 0.60 0.10 0.60 - 0.65 0.26 0.65 - 0.75 0.39 ...
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... Fig 11. Typical transfer characteristics; V Fig 12. Typical transfer characteristics; V 74AUP1G132_1 Product data sheet 240 160 0.4 0.8 1 1200 800 400 0 0 1.0 2 Rev. 01 — 20 October 2006 74AUP1G132 Low-power 2-input NAND Schmitt trigger 001aad691 1.6 2.0 V (V) I 001aad692 3.0 V (V) I © NXP B.V. 2006. All rights reserved ...
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... Product data sheet ( CC(AV) f CC(AV) = average additional supply current ( A). differs with positive or negative input transitions, as shown in CC(AV) 0.3 I CC(AV) (mA) 0.2 0.1 0 0.8 1.8 2.8 CC Rev. 01 — 20 October 2006 74AUP1G132 Low-power 2-input NAND Schmitt trigger where: CC 001aad027 (1) (2) 3.8 V (V) CC © NXP B.V. 2006. All rights reserved. Figure 13 ...
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... 1 scale (1) ( 0.30 0.25 2.25 1.35 0.65 0.15 0.08 1.85 1.15 REFERENCES JEDEC JEITA MO-203 SC-88A Rev. 01 — 20 October 2006 74AUP1G132 Low-power 2-input NAND Schmitt trigger detail 2.25 0.46 1.3 0.425 0.3 0.1 2.0 0.21 EUROPEAN ...
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... scale 1.05 0.35 0.40 0.6 0.5 0.95 0.27 0.32 REFERENCES JEDEC JEITA MO-252 Rev. 01 — 20 October 2006 74AUP1G132 Low-power 2-input NAND Schmitt trigger 4 ( EUROPEAN PROJECTION SOT886 ISSUE DATE 04-07-15 04-07-22 © NXP B.V. 2006. All rights reserved ...
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... Product data sheet scale 1.05 0.35 0.40 0.55 0.35 0.95 0.27 0.32 REFERENCES JEDEC JEITA Rev. 01 — 20 October 2006 74AUP1G132 Low-power 2-input NAND Schmitt trigger 2 mm EUROPEAN ISSUE DATE PROJECTION © NXP B.V. 2006. All rights reserved. SOT891 05-03-11 05-04- ...
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... Transistor-Transistor Logic 19. Revision history Table 13. Revision history Document ID Release date 74AUP1G132_1 20061020 74AUP1G132_1 Product data sheet Low-power 2-input NAND Schmitt trigger Data sheet status Change notice Product data sheet - Rev. 01 — 20 October 2006 74AUP1G132 Supersedes - © NXP B.V. 2006. All rights reserved ...
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... Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. http://www.nxp.com salesaddresses@nxp.com Rev. 01 — 20 October 2006 74AUP1G132 Low-power 2-input NAND Schmitt trigger © NXP B.V. 2006. All rights reserved ...
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... Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2006. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com All rights reserved. Date of release: 20 October 2006 Document identifier: 74AUP1G132_1 ...