74aup2g157 NXP Semiconductors, 74aup2g157 Datasheet

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74aup2g157

Manufacturer Part Number
74aup2g157
Description
74aup2g157 Low-power 2-input Multiplexer
Manufacturer
NXP Semiconductors
Datasheet
1. General description
2. Features
The 74AUP2G157 is a high-performance, low-power, low-voltage, Si-gate CMOS device,
superior to most advanced CMOS compatible TTL families.
Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall
times across the entire V
static and dynamic power consumption across the entire V
This device is fully specified for partial Power-down applications using I
The I
the device when it is powered down.
The 74AUP2G157 is a single 2-input multiplexer which select data from two data inputs (I0
and I1) under control of a common data select input (S). The state of the common data
select input determines the particular register from which the data comes. The output (Y,
Y) presents the selected data in the true (non-inverted) and complement form. The enable
input (E) is active LOW. When E is HIGH, the output Y is forced LOW and the output Y is
forced HIGH regardless of all other input conditions.
I
I
I
I
I
I
I
I
I
I
I
74AUP2G157
Low-power 2-input multiplexer
Rev. 01 — 6 October 2006
Wide supply voltage range from 0.8 V to 3.6 V
High noise immunity
Complies with JEDEC standards:
ESD protection:
Low static power consumption; I
Latch-up performance exceeds 100 mA per JESD 78 Class II
Inputs accept voltages up to 3.6 V
Low noise overshoot and undershoot < 10 % of V
I
Multiple package options
Specified from 40 C to +85 C and 40 C to +125 C
OFF
N
N
N
N
N
N
N
N
OFF
JESD8-12 (0.8 V to 1.3 V)
JESD8-11 (0.9 V to 1.65 V)
JESD8-7 (1.2 V to 1.95 V)
JESD8-5 (1.8 V to 2.7 V)
JESD8-B (2.7 V to 3.6 V)
HBM JESD22-A114-D Class 3A exceeds 5000 V
MM JESD22-A115-A exceeds 200 V
CDM JESD22-C101-C exceeds 1000 V
circuitry provides partial Power-down mode operation
circuitry disables the output, preventing the damaging backflow current through
CC
range from 0.8 V to 3.6 V. This device ensures a very low
CC
= 0.9 A (maximum)
CC
CC
range from 0.8 V to 3.6 V.
Product data sheet
OFF
.

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74aup2g157 Summary of contents

Page 1

... OFF the device when it is powered down. The 74AUP2G157 is a single 2-input multiplexer which select data from two data inputs (I0 and I1) under control of a common data select input (S). The state of the common data select input determines the particular register from which the data comes. The output (Y, Y) presents the selected data in the true (non-inverted) and complement form ...

Page 2

... Ordering information Table 1. Ordering information Type number Package Temperature range Name 74AUP2G157DC +125 C 74AUP2G157GT +125 C 74AUP2G157GM +125 C 4. Marking Table 2. Marking Type number 74AUP2G157DC 74AUP2G157GT 74AUP2G157GM 5. Functional diagram 001aaf509 Fig 1. Logic symbol 1 I0 SELECTOR 2 ...

Page 3

... LOW) 8 supply voltage Rev. 01 — 6 October 2006 74AUP2G157 Low-power 2-input multiplexer 74AUP2G157 terminal 1 index area Transparent top view © NXP B.V. 2006. All rights reserved 001aaf515 ...

Page 4

... +125 C amb derates linearly with 8.0 mW/K. tot derates linearly with 2.4 mW/K. tot Conditions Active mode Power-down mode 0 3 Rev. 01 — 6 October 2006 74AUP2G157 Low-power 2-input multiplexer Output Min Max Unit 0.5 +4 ...

Page 5

... GND GND GND Rev. 01 — 6 October 2006 74AUP2G157 Low-power 2-input multiplexer Min Typ Max ...

Page 6

... GND Rev. 01 — 6 October 2006 74AUP2G157 Low-power 2-input multiplexer Min Typ Max ...

Page 7

... 3 0 GND GND. CC Rev. 01 — 6 October 2006 74AUP2G157 Low-power 2-input multiplexer Min Typ Max ...

Page 8

... V to 1 1 1. 2 3.6 V 1.3 CC [2] Figure 1 1 1. 2 3.6 V 1.4 CC Rev. 01 — 6 October 2006 74AUP2G157 Low-power 2-input multiplexer 10 +125 C [1] Typ Max Min Max ( 6.1 13.3 2.2 13.8 4.2 7.8 2.0 8.4 3.4 6.2 1.6 6.9 2.7 4.3 1.2 4.9 2.4 3.7 1.0 4.0 23.6 ...

Page 9

... V to 1 1 1. 2 3.6 V 1.7 CC [2] Figure 1 1 1. 2 3.6 V 1.7 CC Rev. 01 — 6 October 2006 74AUP2G157 Low-power 2-input multiplexer 10 +125 C [1] Typ Max Min Max ( 6.9 15.1 2.5 15.6 4.8 8.9 2.4 9.6 4.0 7.1 1.9 7.9 3.2 5.0 1.6 5.7 2.9 4.4 1.3 4.7 27.2 ...

Page 10

... V to 1 1 1. 2 3.6 V 2.0 CC [2] Figure 1 1 1. 2 3.6 V 2.0 CC Rev. 01 — 6 October 2006 74AUP2G157 Low-power 2-input multiplexer 10 +125 C [1] Typ Max Min Max ( 7.7 16.8 2.8 17.4 5.4 9.8 2.7 10.6 4.4 7.8 2.2 8.7 3.7 5.6 1.9 6.4 3.4 4.9 1.6 5.3 30.7 ...

Page 11

... V to 1 1 1. 2 3.6 V 2.7 CC [2] Figure 1 1 1. 2 3.6 V 2.7 CC Rev. 01 — 6 October 2006 74AUP2G157 Low-power 2-input multiplexer 10 +125 C [1] Typ Max Min Max ( 9.8 21.6 3.7 22.5 6.9 12.4 3.4 13.6 5.7 10.0 2.8 11.3 4.8 7.2 2.6 8.2 4.4 6.4 2.3 6.9 38.8 ...

Page 12

... where PHL PLH V M Table 9. Rev. 01 — 6 October 2006 74AUP2G157 Low-power 2-input multiplexer 10 +125 C [1] Typ Max Min Max ( ...

Page 13

... 0 PULSE DUT GENERATOR for measuring propagation delays, setup and hold times and pulse width R L Rev. 01 — 6 October 2006 74AUP2G157 Low-power 2-input multiplexer t PLH t PHL 001aaf517 3 EXT ...

Page 14

... Product data sheet 2.5 scale (1) ( 0.27 0.23 2.1 2.4 0.5 0.17 0.08 1.9 2.2 REFERENCES JEDEC JEITA MO-187 Rev. 01 — 6 October 2006 74AUP2G157 Low-power 2-input multiplexer detail 3.2 0.40 0.21 0.4 0.2 0.13 0.15 0.19 3.0 EUROPEAN PROJECTION SOT765-1 v ...

Page 15

... Product data sheet scale 1.05 0.35 0.40 0.6 0.5 0.95 0.27 0.32 REFERENCES JEDEC JEITA - - - MO-252 Rev. 01 — 6 October 2006 74AUP2G157 Low-power 2-input multiplexer 4 ( EUROPEAN PROJECTION © NXP B.V. 2006. All rights reserved. SOT833-1 ISSUE DATE 04-07-22 04-11- ...

Page 16

... 1.65 0.35 0.15 0.55 0.5 0.1 1.55 0.25 0.05 REFERENCES JEDEC JEITA MO-255 - - - Rev. 01 — 6 October 2006 74AUP2G157 Low-power 2-input multiplexer detail 0.05 0.05 0.05 EUROPEAN PROJECTION SOT902 ISSUE DATE 05-11-16 05-11-25 © NXP B.V. 2006. All rights reserved. ...

Page 17

... TTL Transistor-Transistor Logic 15. Revision history Table 12. Revision history Document ID Release date 74AUP2G157_1 20061006 74AUP2G157_1 Product data sheet Data sheet status Change notice Product data sheet - Rev. 01 — 6 October 2006 74AUP2G157 Low-power 2-input multiplexer Supersedes - © NXP B.V. 2006. All rights reserved ...

Page 18

... Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. http://www.nxp.com salesaddresses@nxp.com Rev. 01 — 6 October 2006 74AUP2G157 Low-power 2-input multiplexer © NXP B.V. 2006. All rights reserved ...

Page 19

... Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2006. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com All rights reserved. Date of release: 6 October 2006 Document identifier: 74AUP2G157_1 ...

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