PIC16F616-I/SL Microchip Technology, PIC16F616-I/SL Datasheet - Page 15

• Manufacturer Part Number: PIC16F616-I/SL
• Description: IC PIC MCU FLASH 2KX14 14SOIC
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F616-I/SL

• Program Memory Type: FLASH
• Program Memory Size: 3.5KB (2K x 14)
• Package / Case: 14-SOIC (3.9mm Width), 14-SOL
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 11
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC16F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 128 B
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 11
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: MCP1631RD-DCPC1 - REF DES BATT CHARG OR LED DRIVERAC162083 - HEADER MPLAB ICD2 PIC16F616 8/14
• Eeprom Size: -
• Connectivity: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

FIGURE 2-3:
© 2007 Microchip Technology Inc.
Note 1:
Unimplemented data memory locations, read as ‘0’.
Indirect Addr.
CM1CON0
CM2CON0
CM2CON1
PCLATH
Registers
STATUS
INTCON
VRCON
64 Bytes
PORTC
TMR1H
T1CON
Purpose
PORTA
TMR1L
General
Bank 0
TMR0
PIR1
FSR
PCL
Not a physical register.
(1)
Address
7Fh
3Fh
40h
01h
02h
03h
04h
05h
06h
07h
08h
09h
0Ah
0Bh
0Ch
0Dh
0Eh
0Fh
10h
11h
12h
13h
14h
15h
16h
17h
18h
19h
1Ah
1Bh
1Ch
1Dh
1Eh
1Fh
File
00h
20h
DATA MEMORY MAP OF
THE PIC16F610/16HV610
Accesses 70h-7Fh
Indirect Addr.
OPTION_REG
OSCTUNE
SRCON0
SRCON1
PCLATH
INTCON
STATUS
ANSEL
TRISC
WPUA
TRISA
PCON
IOCA
Bank 1
PIE1
FSR
PCL
(1)
PIC16F610/616/16HV610/616
Address
File
F0h
80h
81h
82h
83h
84h
85h
86h
87h
88h
89h
8Ah
8Bh
8Ch
8Dh
8Eh
8Fh
90h
91h
92h
93h
94h
95h
96h
97h
98h
99h
9Ah
9Bh
9Ch
9Dh
9Eh
9Fh
A0h
FFh
Preliminary
FIGURE 2-4:
Note 1:
Unimplemented data memory locations, read as ‘0’.
Indirect Addr.
PWM1CON
CCP1CON
CM1CON0
CM2CON0
CM2CON1
CCPR1H
ADRESH
ADCON0
Registers
CCPR1L
ECCPAS
STATUS
PCLATH
INTCON
96 Bytes
VRCON
Purpose
PORTC
TMR1H
General
PORTA
TMR1L
T1CON
T2CON
Bank 0
TMR0
TMR2
PIR1
FSR
PCL
Not a physical register.
(1)
Address
6Fh
70h
7Fh
01h
02h
03h
04h
05h
06h
07h
08h
09h
0Ah
0Bh
0Ch
0Dh
0Eh
0Fh
10h
11h
12h
13h
14h
15h
16h
17h
18h
19h
1Ah
1Bh
1Ch
1Dh
1Eh
1Fh
File
00h
20h
DATA MEMORY MAP OF
THE PIC16F616/16HV616
Accesses 70h-7Fh
Indirect Addr.
OPTION_REG
OSCTUNE
Registers
SRCON0
SRCON1
ADCON1
PCLATH
ADRESL
32 Bytes
STATUS
INTCON
Purpose
General
ANSEL
TRISC
WPUA
TRISA
PCON
Bank 1
IOCA
PIE1
FSR
PCL
PR2
DS41288C-page 13
(1)
Address
File
80h
81h
82h
83h
84h
85h
86h
87h
88h
89h
8Ah
8Bh
8Ch
8Dh
8Eh
8Fh
90h
91h
92h
93h
94h
95h
96h
97h
98h
99h
9Ah
9Bh
9Ch
9Dh
9Eh
9Fh
A0h
F0h
FFh
BFh
C0h