PIC12CE673-04/P Microchip Technology, PIC12CE673-04/P Datasheet - Page 302

• Manufacturer Part Number: PIC12CE673-04/P
• Description: IC MCU OTP 1KX14 A/D&EE 8DIP
• Manufacturer: Microchip Technology
• Series: PIC® 12Cr

Specifications of PIC12CE673-04/P

• Core Size: 8-Bit
• Program Memory Size: 1.75KB (1K x 14)
• Core Processor: PIC
• Speed: 4MHz
• Peripherals: POR, WDT
• Number Of I /o: 5
• Program Memory Type: OTP
• Eeprom Size: 16 x 8
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 4x8b
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 8-DIP (0.300", 7.62mm)
• Controller Family/series: PIC12
• No. Of I/o's: 6
• Eeprom Memory Size: 16Byte
• Ram Memory Size: 128Byte
• Cpu Speed: 4MHz
• No. Of Timers: 1
• Processor Series: PIC12C
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 128 B
• Maximum Clock Frequency: 4 MHz
• Number Of Programmable I/os: 5
• Number Of Timers: 8
• Maximum Operating Temperature: + 70 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: ICE2000
• Minimum Operating Temperature: 0 C
• On-chip Adc: 8
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: ISPICR1 - ADAPTER IN-CIRCUIT PROGRAMMINGAC124001 - MODULE SKT PROMATEII 8DIP/SOIC
• Connectivity: -
• Lead Free Status / Rohs Status: Details

PICmicro MID-RANGE MCU FAMILY
17.4.2
DS31017A-page 17-26
GCEN (SSPCON2<7>)
SDA
SCL
SSPIF
SSPOV (SSPCON1<6>)
BF (SSPSTAT<0>)
General Call Address Support
S
The addressing procedure for the I
usually determines which device will be the slave addressed by the master. The exception is the
general call address which can address all devices. When this address is used, all devices
should, in theory, respond with an acknowledge.
The general call address is one of eight addresses reserved for specific purposes by the I
tocol. It consists of all 0’s with R/W = 0.
The general call address is recognized when the General Call Enable bit (GCEN) is enabled
(SSPCON2<7> set). Following a start-bit detect, 8-bits are shifted into SSPSR and the address
is compared against SSPADD, and is also compared to the general call address, fixed in hard-
ware.
If the general call address matches, the SSPSR is transferred to the SSPBUF, the BF flag bit is
set (eight bit), and on the falling edge of the ninth bit (ACK bit) the SSPIF interrupt flag bit is set.
When the interrupt is serviced. The source for the interrupt can be checked by reading the con-
tents of the SSPBUF to determine if the address was device specific or a general call address.
In 10-bit mode, the SSPADD is required to be updated for the second half of the address to
match, and the UA bit is set (SSPSTAT<1>). If the general call address is sampled when the
GCEN bit is set while the slave is configured in 10-bit address mode, then the second half of the
address is not necessary, the UA bit will not be set, and the slave will begin receiving data after
the acknowledge
Figure 17-16: Slave Mode General Call Address Sequence (7 or 10-bit Address Mode)
1
2
General Call Address
3
(Figure
4
5
17-16).
6
Preliminary
7
R/W = 0
2
C bus is such that the first byte after the START condition
8
ACK
Address is compared to General Call Address
after ACK, set interrupt
9
D7
1
D6
2
Cleared in software
SSPBUF is read
Receiving data
D5
3
D4
4
D3
5
1997 Microchip Technology Inc.
D2
6
D1
7
D0
8
ACK
9
'0'
'1'
2
C pro-