DSPIC30F1010-30I/SO Microchip Technology, DSPIC30F1010-30I/SO Datasheet
DSPIC30F1010-30I/SO
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DSPIC30F1010-30I/SO Summary of contents
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... Family Silicon Errata and Data Sheet Clarification The dsPIC30F1010/202X family devices that you have received conform functionally to the current Device Data Sheet (DS70178C), except for the anomalies described in this document. The silicon issues discussed in the following pages are for silicon revisions with the Device and Revision IDs listed in Table 1 ...
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... The PWM module may not operate at temperatures below -20ºC. The PWM output may exhibit an occasional jitter proportional to the operating speed of the dsPIC30F1010/202X device. Setting the XPRES bit in the PWMCONx register should enable a current-limit source to reset the PWM period when the PWM generated is configured in Independent Time Base mode ...
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... Note 1: Only those issues indicated in the last column apply to the current silicon revision. © 2010 Microchip Technology Inc. dsPIC30F1010/202X Issue Summary The output compare module produces a glitch on the output when an I/O pin is initially set high and the module is configured to drive the pin low at a specified time ...
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... TABLE 2: SILICON ISSUE SUMMARY (CONTINUED) Item Module Feature Number Bus Collision 36 ACK/NACK 37. Status Slave Mode 38 1-bit and 8-bit 39. Operation Addressing 40 Addressing 41 Addressing 42. MCLR Pin BOR Event 43. PSV — 44. Operations Sleep Mode — 45. RB7 Pin and All — 46. Multiplexed Functions CPU – DAW.b 47 ...
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... © 2010 Microchip Technology Inc. dsPIC30F1010/202X 3. Module: PWM Each PWM generator can be configured to generate a trigger for the ADC module or a trigger interrupt at any point during the PWM period. The point in time during the PWM period that the trigger is set is specified in the TRIGx register for PWM Individual Trigger the SEVTCMP register for the Special Event Trigger ...
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... DS80445D-page 6 6. Module: PWM The dsPIC30F1010/202X device data sheet states that the minimum PWM duty cycle value is 0x0010. Duty cycle values less than 0x0010 should cause the PWM outputs to display states corresponding to a duty cycle value of 0x0000. However, when a value of 0x0010 or less is loaded ...
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... FLTDAT<1:0> EQUATION 1: PWMxH = (OVRDAT<1>) AND (CLDAT<1>) AND (FLTDAT<1> AND 0 AND PWMxL = (OVRDAT<0>) AND (CLDAT<0>) AND (FLTDAT<0> AND 1 AND © 2010 Microchip Technology Inc. dsPIC30F1010/202X If all three overrides occur simultaneously, the following operations shown in Equation 1 will Data Sheet” determine the state of the PWMx pin. ...
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... Module: PWM In Push-Pull mode, with immediate updates enabled, the PWM pins may become swapped. Work around If using the PWM module in Push-Pull mode, immediate updates must be disabled. Affected Silicon Revisions Module: PWM The PWM module may not temperatures below -20ºC. During this condition, ...
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... © 2010 Microchip Technology Inc. dsPIC30F1010/202X 12. Module: ADC In order to perform multiple analog-to-digital conversions using the global software trigger, the PxRDY bits in the ADSTAT register must be cleared. The data sheet indicates that the user can configure the ADC pin pairs to perform a conversion when the GSWTRG bit in the ADCON register is set ...
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... The channels included are AN1, AN3, AN5, AN7, AN8, AN9, AN10 and AN11 (depending on the package variant). In the dsPIC30F1010 device, all of the channels mentioned above are included, plus AN4 and AN6. Work around In the ADCON register, configure the ADC with Order = 0 and SEQSAMP = 1 ...
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... This operation needs to be performed when the transmit buffer is written. If FRMDLY = 0, no work around is needed. Note: The dsPIC30F1010/202X devices have only one SPI. All references are intended for software compatibility with other dsPIC DSC devices. Affected Silicon Revisions ...
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... In this mode, whether the SMP bit is set or cleared, the data is always sampled at the end of the data output time. Note: The dsPIC30F1010/202X devices have only one SPI. All references are intended for software compatibility with other dsPIC DSC devices. Work around ...
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... The operation of this bit is the inverse of the stated operation “dsPIC30F1010/202X Data Sheet” (DS70178). The signal received from an IrDA transceiver can have an Idle state of ‘1’ or ‘0’. The following table summarizes how UART receptions will occur when used with the IrDA decoder. TABLE 4: ...
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... Module: UART When the UART is configured for IR interface operations (UxMODE<9:8> = 11), the 16x baud clock signal on the BCLK pin is present only when the module is transmitting. The pin is idle at all other times. Work around Configure one of the output compare modules to generate the required baud clock signal when the UART is receiving data Idle state ...
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... C devices, the addresses, as well as bits A10 and A9, should be different. Affected Silicon Revisions © 2010 Microchip Technology Inc. dsPIC30F1010/202X 2 41. Module 10-bit Addressing mode, some address matches do not set the RBF flag or load the receive register, I2CxRCV, if the lower address byte matches the ...
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... Module: MCLR Pin A brown-out event occurs when V the minimum operating voltage for the device but not all the way down the dsPIC DSC SS SMPS device is running with the PLL enabled and a brown-out event occurs, the device may stop running; and, the MCLR pin will not reset the device ...
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... © 2010 Microchip Technology Inc. dsPIC30F1010/202X 45. Module: Sleep Mode Execution of the Sleep instruction (PWRSAV #0) may cause incorrect program operation after the device wakes up from Sleep. The current consumption during Sleep may also increase beyond the specifications listed in the device data sheet. ...
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... EXAMPLE 2: ; ---------------------------------------------------------------------------------------------- .global __reset .global _main .global _GotoSleep .global __AddressError .global __INT1Interrupt ; ---------------------------------------------------------------------------------------------- .section *, code _main: BSET INTCON2, #INT1EP ; Set up INT pins to detect falling edge BCLR IFS1, #INT1IF ; Clear interrupt pin interrupt flag bits BSET IEC1, #INT1IE ; Enable ISR processing for INT pins ...
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... Note: The above work around is recommended for users for whom application hardware changes are not possible. © 2010 Microchip Technology Inc. dsPIC30F1010/202X Work around 3: Instead of executing a PWRSAV #0 instruction to put the device into Sleep mode, perform a clock switch to the 32 kHz Low-Power (LP) Oscillator with a 64:1 postscaler mode ...
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... Module: RB7 Pin and All Multiplexed Functions None of the functions multiplexed on this pin yields correct results. TABLE 5: THE AFFECTED PINS ON THE dsPIC Device 28-pin SDIP dsPIC30F1010 28-pin SOIC dsPIC30F2020 28-pin SDIP 28-pin SOIC dsPIC30F2023 44-pin TQFP As a result of this erratum, the following issues exist: • ...
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... The EXTREF pin is more susceptible to negative current spikes than the other pins on the dsPIC30F1010/202X A3 devices. TABLE 6: EXTREF PIN CONFIGURATIONS SUSCEPTIBLE TO NEGATIVE CURRENT TRANSIENTS Pin Configuration ...
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... Module: Analog Comparator Output from the Analog Comparator may falsely switch state if an ADC conversion trigger and two or more PWM edges occur at the same time. This behavior is observed when multiple PWM outputs are used in the Independent Time Base mode and the Analog Comparator is con- figured as a Fault current-limit input to the PWM ...
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... Characteristic No Input Low Voltage DI19 SDA, SCL V Input High Voltage IH DI29 SDA, SCL © 2010 Microchip Technology Inc. dsPIC30F1010/202X specifica- IL Standard Operating Conditions: 3.3V and 5.0V (±10%) (unless otherwise stated) -40°C ≤ T Operating temperature -40°C ≤ T Min Typ Max V — 0 ...
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... This document replaces the following errata documents: • DS80290, “dsPIC30F1010/202X Rev. A1 Silicon Errata” • DS80319, “dsPIC30F1010/202X Rev. A2 Silicon Errata” • DS80391, “dsPIC30F1010/202X Rev. A3 Silicon Errata” Rev B Document (7/2009) Added silicon issue 49 (Analog Comparator). Rev C Document (1/2010) Updated silicon issue 6 (PWM). ...
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... PICtail, REAL ICE, rfLAB, Select Mode, Total Endurance, TSHARC, UniWinDriver, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. ...
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