PIC24HJ64GP506-I/PT Microchip Technology, PIC24HJ64GP506-I/PT Datasheet
PIC24HJ64GP506-I/PT
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PIC24HJ64GP506-I/PT Summary of contents
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... Microchip Technology Inc. Family Overview High-Performance 16-Bit Microcontrollers Preliminary PIC24H DS70166A ...
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... PowerMate, PowerTool, rfLAB, rfPICDEM, Select Mode, Smart Serial, SmartTel, Total Endurance and WiperLock are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. ...
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... CPU is executing code (no cycle stealing) • dual-ported DMA buffer area (DMA RAM) to store data transferred via DMA • Most peripherals support DMA © 2005 Microchip Technology Inc. PIC24H Interrupt Controller • 5-cycle latency • 118 interrupt vectors • available interrupt sources external interrupts • ...
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... Fully static design • 3.3V (+/- 10%) operating voltage • Industrial temperature • Low-power consumption Packaging: • 100-pin TQFP (14x14x1 mm and 12x12x1 mm) • 64-pin TQFP (10x10x1 mm) Note: See Table 1-1 for exact peripheral features per device. Preliminary © 2005 Microchip Technology Inc. ...
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... Note 1: RAM size is inclusive DMA RAM. 2: Maximum I/O pin count includes pins shared by the peripheral functions. © 2005 Microchip Technology Inc ADC ADC ADC, ...
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... Three-digit QTP, SQTP, Code or Special Requirements (blank otherwise Engineering Sample DS70166A-page 4 Examples: a) dsPIC24HJ64GP610I/PT: General Purpose dsPIC24H program memory, 100-pin, Industrial temp., TQFP package. b) dsPIC24HJ64GP206I/PT-ES: Motor Control dsPIC24H program memory, 64-pin, Industrial temp., TQFP package, Engineering Sample. Preliminary © 2005 Microchip Technology Inc. ...
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... Memory Mapped Divide Control 16-bit ALU Legend: MCU/DSP X-Data Path Address Path © 2005 Microchip Technology Inc. Further, Direct Memory Access (DMA) enables overhead-free transfer of data between several peripherals and a dedicated DMA RAM. Reliable, field programmable Flash program scalability of applications that use PIC24H devices. ...
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... DMA Error Vector Reserved Vector Reserved Vector 000014 0000FE Reserved 000100 000104 0001FE 000200 User Flash Program Memory (87552 x 24-bit) 02ABFE 02AC00 Reserved 7FFFFE 800000 Reserved F7FFFE F80000 F80016 F80018 Reserved FEFFFE FF0000 FF0002 FF0004 Reserved FFFFFE © 2005 Microchip Technology Inc. ...
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... INTERRUPT OVERVIEW The PIC24H has a vectored exception scheme with sources of non-maskable traps and 67 interrupt sources. Each interrupt source can be assigned to one of seven priority levels. © 2005 Microchip Technology Inc. 3.1.5 FEATURES TO ENHANCE COMPILER EFFICIENCY The CPU architecture possesses several features that lead to a more efficient (code size and speed) C compiler ...
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... W14 can be referenced by any instruction in the same manner as all other W registers. The Stack Pointer always points to the first available free word and grows from lower addresses towards higher addresses. It pre-decrements for stack pops (reads) and post-increments for stack pushes (writes). Preliminary © 2005 Microchip Technology Inc. ...
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... PROGRAMMER’S MODEL DIV and MUL Result Registers TABPAG TBLPAG Data Table Page Address 7 0 PSVPAG PSVPAG — — — — — — — SRH © 2005 Microchip Technology Inc W0/WREG W10 W11 W12 W13 W14/Frame Pointer W15*/Stack Pointer SPLIM* 0 ...
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... All word accesses must be aligned to an even address. Misaligned word data fetches are not supported. Should a misaligned read or write be attempted, a trap will then be executed, allowing the system and/or user to examine the machine state prior to execution of the address Fault. Preliminary © 2005 Microchip Technology Inc. compatibility with ...
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... Data Space Optionally Mapped into Program Memory Note: This data memory map is for the largest memory PIC24H device. Data memory maps for other devices may vary. © 2005 Microchip Technology Inc. 16 Bits Address MSB LSB 0x0001 SFR Space 0x07FF 0x0801 ...
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... Peripheral SFR data write collision between the CPU and the DMA Controller Peripheral Indirect Address DMA Controller DMA Channels DMA DS Bus Preliminary DMA Ready Peripheral 3 CPU DMA CPU DMA CPU DMA DMA DMA Ready Ready Peripheral 2 Peripheral 1 © 2005 Microchip Technology Inc. ...
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... Microchip Technology Inc. Each individual interrupt source has its own vector address and can be individually enabled and prioritized in user software. Each interrupt source also has its own status flag. This independent control and monitoring of the interrupt eliminates the need to poll various status ...
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... U2E – UART2 Error 0x00019A Reserved 0x00019C DMA6 – DMA Channel 6 0x00019E DMA7 – DMA Channel 7 0x0001A0 C1TX – ECAN1 Transmit Data Request 0x0001A2 C2TX – ECAN2 Transmit Data Request 0x0001A4- Reserved 0x0001FE Preliminary Interrupt Source © 2005 Microchip Technology Inc. ...
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... Microchip Technology Inc. 5.3 Traps Traps can be considered as non-maskable, nestable interrupts that adhere to a fixed priority structure. priorities, Traps are intended to provide the user a means to correct erroneous operation during debug and when operating within the application. If the user does not ...
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... A Fail-Safe Clock Monitor (FSCM) that detects clock failure and takes fail-safe measures • A Clock Control register (OSCCON) • Nonvolatile Configuration bits for main oscillator selection. A simplified block diagram of the oscillator system is shown in Figure 6- Preliminary © 2005 Microchip Technology Inc. ...
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... Power-on Reset and wake-up from Sleep). The Oscillator Start-up Timer is applied to the LP oscillator, XT and HS modes (upon wake-up from Sleep, POR and Brown-out Reset (BOR)) for the primary oscillator. © 2005 Microchip Technology Inc. PLL Module Primary Osc Clock ...
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... POR: Power-on Reset • BOR: Brown-out Reset • SWR: RESET Instruction • EXTR: MCLR Reset • WDTR: Watchdog Timer Time-out Reset • TRAPR: Trap Conflict • IOPUWR: Attempted execution of an Illegal Opcode, or Indirect Addressing, using an Uninitialized W register Preliminary © 2005 Microchip Technology Inc. ...
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... Any peripheral that is operating on the system clock source is disabled in Sleep mode. © 2005 Microchip Technology Inc. The processor exits (wakes up) from Sleep on one of these events: • Any interrupt source that is individually enabled • ...
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... Timer1, when operating in Real-Time Clock (RTC) mode, provides time of day and event time-stamping capabilities. Key operational features of the RTC are: • Operation from 32 kHz LP oscillator • 8-bit prescaler • Low power • Real-Time Clock interrupts Preliminary © 2005 Microchip Technology Inc. ...
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... Selectable prescaler settings • Timer counter operation during Idle and Sleep modes • Interrupt on a 32-Bit Period register match • Timer2/3 can use DMA for buffer storage © 2005 Microchip Technology Inc. PR1 Comparator x 16 TMR1 Q D ...
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... Slave select synchronization allows selective enabling of SPI slave devices, which is particularly useful when a single master is connected to multiple slaves. The SPI1 and SPI2 modules support DMA data transfers. Preliminary © 2005 Microchip Technology Inc. ® SPI and SIOP ...
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... Slew rate control for 100 kHz and 400 kHz bus speeds mode, pin SCL is clock and pin SDA is data. The module will override the data direction bits for these pins. © 2005 Microchip Technology Inc. 8.8 Controller Area Network (CAN) Module The Controller Area Network (CAN) module is a serial interface useful for communicating with other CAN modules or microcontroller devices ...
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... Sleep mode, when the clocks are disabled. There are external signals (CN0 through CN23) that can be selected (enabled) for generating an interrupt request on a change of state. Each of the CN pins also has an optional weak pull-up feature. Preliminary © 2005 Microchip Technology Inc. ...
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... Rotate/Shift Instructions Bit Instructions Compare/Skip Instructions Program Flow Instructions Shadow/Stack Instructions Control Instructions © 2005 Microchip Technology Inc. 9.2.1 MULTI-CYCLE INSTRUCTIONS As the instruction summary tables show, most instructions execute in a single cycle with the following exceptions: • Instructions MOV.D, POP.D, PUSH.D, TBLRDH, TBLRDL, TBLWTH and TBLWTL require 2 cycles to execute ...
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... Working register multiplier pair (different source registers) Wm*Wn Both source and destination working register (direct addressing) Wn Destination working register (direct addressing) Wnd Source working register (direct addressing) Wns Default working register WREG Source working register (direct and indirect addressing) Ws DS70166A-page 26 Description Preliminary © 2005 Microchip Technology Inc. ...
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... Table 9-3 through Table 9-11 present the base instruction syntax for the PIC24H. These instructions do not include all of the available addressing modes. For example, some instructions show the Byte Addressing mode and others do not. © 2005 Microchip Technology Inc. Description Swap Wns and Wnd ...
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... – lit10 – lit5 – Ws Destination = f – WREG – ( – lit10 – ( – lit5 – ( – Ws – (C) Destination = WREG – f – ( lit5 – Wb – ( – Wb – (C) Destination = WREG – lit5 – – Wb Wnd = zero-extended Ws Preliminary Words Cycles © 2005 Microchip Technology Inc. ...
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... Wb,#lit5,Wd XOR Wb,Ws,Wd Note: When the optional {,WREG} operand is specified, the destination of the instruction is WREG. When {,WREG} is not specified, the destination of the instruction is the file register f. © 2005 Microchip Technology Inc. Description Destination = f .AND. WREG Wn = lit10 .AND .AND. lit5 .AND 0x0000 ...
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... Bit test f then set f Bit test then set Ws Bit test then set Ws Find bit change from left (MSb) side Find first one from left (MSb) side Find first one from right (LSb) side Preliminary Words Cycles Words Cycles © 2005 Microchip Technology Inc. ...
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... Bit positions are specified by bit4 (0:15) for word operations. 2: Conditional skip instructions execute in 1 cycle if the skip is not taken, 2 cycles if the skip is taken over a one-word instruction and 3 cycles if the skip is taken over a two-word instruction. © 2005 Microchip Technology Inc. Description Preliminary PIC24H ...
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... Call subroutine Call indirect subroutine Go to address Go to address indirectly Relative call Computed call Repeat next instruction (lit14 + 1) times Repeat next instruction ( times Return from interrupt enable Return with lit10 in Wn Return from subroutine Preliminary Words Cycles ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( (2) © 2005 Microchip Technology Inc. ...
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... Syntax CLRWDT DISI #lit14 NOP NOPR PWRSAV #lit1 RESET © 2005 Microchip Technology Inc. Description Link Frame Pointer Pop TOS to f Pop TOS to Wd Double pop from TOS to Wnd:Wnd + 1 Pop shadow registers Push f to TOS Push Ws to TOS Push double Wns:Wns + 1 to TOS ...
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... Socket Module for 100L TQFP Devices ( mm) Socket Module for 80L TQFP Devices ( mm) Socket Module for 64L TQFP Devices ( mm) Preliminary Part # From SW007002 Microchip SW007002 Microchip SW007002 Microchip SW007002 Microchip SW006012 Microchip DV164005 Microchip DV007004 Microchip TBD Microchip TBD Microchip TBD Microchip © 2005 Microchip Technology Inc. ...
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... Color keyed editor makes source code debug easier Status bar updates on single step or run © 2005 Microchip Technology Inc. • Context sensitive, interactive on-line help • Integrated MPLAB SIM instruction simulator • User interface for MPLAB PM3 and PICSTART Plus device programmers (sold separately) • ...
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... Integrates seamlessly in MPLAB Project • Printed reports ease project documentation requirements • MPLAB Visual Device Initializer is an MPLAB plug-in and can be installed independently of MPLAB IDE FIGURE 10-2: software Preliminary ® MPLAB VDI DISPLAY © 2005 Microchip Technology Inc. ...
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... MPLAB C30 C Compiler/Linker/ Librarian The Microchip Technology MPLAB C30 C Compiler provides ‘C’ language support for the PIC24H family. This C compiler is a fully ANSI-compliant product with standard libraries highly optimized for the PIC24H family and takes advantage of many PIC24H architecture-specific features to help you generate very efficient software code ...
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... Large easy-to-read display • Field upgradeable firmware allows quick new device support • Secure Digital (SD) and Multimedia Card (MMC) external memory support • Buzzer notification for noisy environments FIGURE 10-5: MPLAB PROGRAMMER Preliminary © 2005 Microchip Technology Inc. ® PM3 DEVICE ...
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... Data Analysis Tool and DSP Software) TCP/IP Library (see Section 11.4 Microchip TCP/IP Stack) © 2005 Microchip Technology Inc. Table 11-1 summarizes available and planned PIC24H software tools and libraries. Microchip also provides value added services, such as skilled/certified technical application contacts, reference designs and hardware and software developers ...
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... Preliminary © 2005 Microchip Technology Inc. (1,2) 5250 4 (1,3) 122 124 109 361 ...
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... Predefined constants in the ‘C’ include files eliminate the need to refer to the details and structure of every Special Function Register while initializing peripherals or checking status bits. © 2005 Microchip Technology Inc. 11.3 dsPICworks™ Data Analysis Tool and DSP Software The dsPICworks tool is a free data analysis and signal ...
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... MAC, SLIP, ARP, IP, ICMP, TCP, SNMP, UDP, DHCP, FTP, IP Gleaning, HTTP, MPFS (Microchip File System) • Can be used as a part of the HTTP Server (included) or any custom TCP/IP-based application • RTOS independent Preliminary on the PIC24H using the © 2005 Microchip Technology Inc. ...
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... PIC24H products, Microchip also partners with key third party tool manufacturers to develop quality hardware and software tools in support of the PIC24H product family. Details of various third party development tools will be provided shortly. © 2005 Microchip Technology Inc. Preliminary PIC24H DS70166A-page 43 ...
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... These two boards are shown in Table 13-1. Microchip plans to offer development boards to support the PIC24H product family. Contact Microchip DSCD Marketing for additional information. Description DM300019 DM240001 AC300030 Preliminary © 2005 Microchip Technology Inc. additional hardware Part # From Microchip Microchip TBD Microchip TBD Microchip Microchip ...
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... Can accommodate 100 to 80-pin adapter PIC24H plug-in module FIGURE 13-1: dsPICDEM™ 80-PIN STARTER DEVELOPMENT BOARD © 2005 Microchip Technology Inc. 13.2 Explorer 16 Development Board This development board offers a very economical way to evaluate both the PIC24H General-purpose and Motor Control Family devices, as well as the PIC24F devices ...
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... Stereo Audio Cable • Stereo Headset • Two 14.7456 MHz Oscillators • Clip-on Microphone • Fold-up Speaker • 6 ft. DB9 M/F RS-232 Cable • DB9M-DB9M Null Modem Adapter Preliminary © 2005 Microchip Technology Inc. towards acoustics-oriented ...
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... Legend: CMOS = CMOS compatible input or output; Analog = Analog input ST = Schmitt Trigger input with CMOS levels Output Input Power © 2005 Microchip Technology Inc. Table A-1 provides a brief description of device I/O pinouts and functions that can be multiplexed to a port pin. Multiple functions may exist on one port pin. When multiplexing occurs, the peripheral module’ ...
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... Positive supply for peripheral logic and I/O pins. — CPU logic filter capacitor connection. — Ground reference for logic and I/O pins. Analog Analog voltage reference (high) input. Analog Analog voltage reference (low) input. Preliminary Description © 2005 Microchip Technology Inc. ...
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... SS2/T5CK/CN11/RG9 AN5/IC8/CN7/RB5 11 AN4/IC7/CN6/RB4 12 AN3/CN5/RB3 13 AN2/SS1/LVDIN/CN4/RB2 14 PGC3/EMUC3/AN1/V -/CN3/RB1 15 REF PGD3/EMUD3/AN0/V +/CN2/RB0 16 REF Note: The PIC24HJ64GP206 device does not have the SCL2 and SDA2 pins. © 2005 Microchip Technology Inc. 48 PGC2/EMUC2/SOSCO/T1CK/CN0/RC14 47 PGD2/EMUD2/SOSCI/T4CK/CN1/RC13 46 OC1/RD0 45 IC4/INT4/RD11 44 IC3/INT3/RD10 43 IC2/U1CTS/INT2/RD9 42 IC1/INT1/RD8 PIC24HJ64GP206 OSC2/CLKO/RC15 PIC24HJ128GP206 39 OSC1/CLKIN/RC12 PIC24HJ256GP206 SCL1/RG2 ...
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... AN16/T2CK/T7CK/RC1 2 AN17/T3CK/T6CK/RC2 3 SCK2/CN8/RG6 4 SDI2/CN9/RG7 5 SDO2/CN10/RG8 6 MCLR 7 SS2/T5CK/CN11/RG9 AN5/IC8/CN7/RB5 11 AN4/IC7/CN6/RB4 12 AN3/CN5/RB3 13 AN2/SS1/LVDIN/CN4/RB2 14 PGC3/EMUC3/AN1/V -/CN3/RB1 15 REF PGD3/EMUD3/AN0/V +/CN2/RB0 16 REF DS70166A-page 50 48 PGC2/EMUC2/SOSCO/T1CK/CN0/RC14 47 PGD2/EMUD2/SOSCI/T4CK/CN1/RC13 46 OC1/RD0 45 IC4/INT4/RD11 44 IC3/INT3/RD10 43 IC2/U1CTS/INT2/RD9 42 IC1/INT1/RD8 PIC24HJ128GP306 OSC2/CLKO/RC15 39 OSC1/CLKIN/RC12 SCL1/RG2 36 SDA1/RG3 35 U1RTS/SCK1/INT0/RF6 34 U1RX/SDI1/RF2 33 U1TX/SDO1/RF3 Preliminary SS DD © 2005 Microchip Technology Inc. ...
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... SCK2/CN8/RG6 4 SDI2/CN9/RG7 5 SDO2/CN10/RG8 6 MCLR 7 SS2/T5CK/CN11/RG9 AN5/IC8/CN7/RB5 11 AN4/IC7/CN6/RB4 12 AN3/CN5/RB3 13 AN2/SS1/LVDIN/CN4/RB2 14 PGC3/EMUC3/AN1/V -/CN3/RB1 15 REF PGD3/EMUD3/AN0/V +/CN2/RB0 16 REF © 2005 Microchip Technology Inc. 48 PGC2/EMUC2/SOSCO/T1CK/CN0/RC14 47 PGD2/EMUD2/SOSCI/T4CK/CN1/RC13 46 OC1/RD0 45 IC4/INT4/RD11 44 IC3/INT3/RD10 43 IC2/U1CTS/INT2/RD9 42 IC1/INT1/RD8 41 V PIC24HJ64GP506 40 OSC2/CLKO/RC15 PIC24HJ128GP506 39 OSC1/CLKIN/RC12 SCL1/RG2 36 SDA1/RG3 35 U1RTS/SCK1/INT0/RF6 34 U1RX/SDI1/RF2 33 U1TX/SDO1/RF3 Preliminary PIC24H SS DD DS70166A-page 51 ...
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... AN3/CN5/RB3 22 AN2/SS1/LVDIN/CN4/RB2 23 PGC3/EMUC3/AN1/CN3/RB1 24 PGD3/EMUD3/AN0/CN2/RB0 25 DS70166A-page 52 PIC24HJ64GP210 PIC24HJ128GP210 PIC24HJ128GP310 PIC24HJ256GP210 Preliminary PGC2/EMUC2/SOSCO/T1CK/CN0/RC14 73 PGD2/EMUD2/SOSCI/CN1/RC13 OC1/RD0 72 IC4/RD11 71 70 IC3/RD10 69 IC2/RD9 IC1/RD8 68 INT4/RA15 67 INT3/RA14 OSC2/CLKO/RC15 63 OSC1/CLKIN/RC12 TDO/RA5 61 TDI/RA4 60 59 SDA2/RA3 SCL2/RA2 58 SCL1/RG2 57 56 SDA1/RG3 55 SCK1/INT0/RF6 54 SDI1/RF7 SDO1/RF8 53 U1RX/RF2 52 51 U1TX/RF3 © 2005 Microchip Technology Inc. ...
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... AN19/T5CK/T8CK/RC4 9 10 SCK2/CN8/RG6 SDI2/CN9/RG7 11 12 SDO2/CN10/RG8 13 MCLR SS2/CN11/RG9 TMS/RA0 17 AN20/INT1/RE8 18 AN21/INT2/RE9 19 AN5/CN7/RB5 20 AN4/CN6/RB4 21 AN3/CN5/RB3 22 AN2/SS1/LVDIN/CN4/RB2 23 PGC3/EMUC3/AN1/CN3/RB1 24 25 PGD3/EMUD3/AN0/CN2/RB0 © 2005 Microchip Technology Inc. PIC24HJ64GP510 PIC24HJ128GP510 Preliminary PIC24H PGC2/EMUC2/SOSCO/T1CK/CN0/RC14 73 PGD2/EMUD2/SOSCI/CN1/RC13 OC1/RD0 72 IC4/RD11 71 70 IC3/RD10 69 IC2/RD9 IC1/RD8 68 INT4/RA15 67 66 INT3/RA14 OSC2/CLKO/RC15 63 OSC1/CLKIN/RC12 TDO/RA5 ...
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... AN20/INT1/RE8 18 AN21/INT2/RE9 19 AN5/CN7/RB5 20 AN4/CN6/RB4 21 AN3/CN5/RB3 22 AN2/SS1/LVDIN/CN4/RB2 23 PGC3/EMUC3/AN1/CN3/RB1 24 PGD3/EMUD3/AN0/CN2/RB0 25 DS70166A-page 54 PIC24HJ256GP610 Preliminary PGC2/EMUC2/SOSCO/T1CK/CN0/RC14 73 PGD2/EMUD2/SOSCI/CN1/RC13 72 OC1/RD0 71 IC4/RD11 70 IC3/RD10 69 IC2/RD9 68 IC1/RD8 INT4/RA15 67 66 INT3/RA14 OSC2/CLKO/RC15 63 OSC1/CLKIN/RC12 TDO/RA5 60 TDI/RA4 59 SDA2/RA3 58 SCL2/RA2 SCL1/RG2 57 56 SDA1/RG3 55 SCK1/INT0/RF6 SDI1/RF7 54 53 SDO1/RF8 52 U1RX/RF2 51 U1TX/RF3 © 2005 Microchip Technology Inc. ...
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... NOTES: © 2005 Microchip Technology Inc. Preliminary PIC24H DS70166A-page 55 ...
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... Taiwan - Kaohsiung Tel: 886-7-536-4818 Fax: 886-7-536-4803 Taiwan - Taipei Tel: 886-2-2500-6610 Fax: 886-2-2508-0102 Thailand - Bangkok Tel: 66-2-694-1351 Fax: 66-2-694-1350 Preliminary © 2005 Microchip Technology Inc. EUROPE Austria - Weis Tel: 43-7242-2244-399 Fax: 43-7242-2244-393 Denmark - Copenhagen Tel: 45-4450-2828 Fax: 45-4485-2829 France - Paris Tel: 33-1-69-53-63-20 ...