AT91SAM7L64-AU Atmel, AT91SAM7L64-AU Datasheet - Page 430

• Manufacturer Part Number: AT91SAM7L64-AU
• Description: MCU ARM7 64K HS FLASH 128-LQFP
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM7L64-AU

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 36MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LCD, POR, PWM, WDT
• Number Of I /o: 80
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 6K x 8
• Voltage - Supply (vcc/vdd): 1.55 V ~ 1.8 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 128-LQFP
• Controller Family/series: AT91SAM7xxx
• No. Of I/o's: 80
• Ram Memory Size: 6KB
• Cpu Speed: 36MHz
• No. Of Timers: 1
• Rohs Compliant: Yes
• Processor Series: AT91SAMx
• Core: ARM7TDMI
• Data Bus Width: 32 bit
• Data Ram Size: 6 KB
• Interface Type: 2-Wire, SPI, USART
• Maximum Clock Frequency: 36 MHz
• Number Of Programmable I/os: 80
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: AT91SAM-ICE, AT91-ISP, AT91SAM7L-EK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 4 Channel
• For Use With: AT91SAM7L-STK - KIT EVAL FOR AT91SAM7LAT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

31.5.11.2
430
AT91SAM7L128/64 Preliminary
WAVSEL = 10
Figure 31-8. WAVSEL= 00 with trigger
When WAVSEL = 10, the value of TC_CV is incremented from 0 to the value of RC, then auto-
matically reset on a RC Compare. Once the value of TC_CV has been reset, it is then
incremented and so on. See
It is important to note that TC_CV can be reset at any time by an external event or a software
trigger if both are programmed correctly. See
In addition, RC Compare can stop the counter clock (CPCSTOP = 1 in TC_CMR) and/or disable
the counter clock (CPCDIS = 1 in TC_CMR).
Figure 31-9. WAVSEL = 10 Without Trigger
Waveform Examples
0xFFFF
Counter Value
R
R
R
TIOB
TIOA
C
B
A
Waveform Examples
0xFFFF
Counter Value
R
R
R
TIOB
TIOA
C
B
A
Figure
31-9.
Counter cleared by compare match with RC
Figure
Counter cleared by compare match with 0xFFFF
31-10.
Counter cleared by trigger
Time
6257A–ATARM–20-Feb-08
Time