AT91SAM7L64-AU Atmel, AT91SAM7L64-AU Datasheet - Page 493

• Manufacturer Part Number: AT91SAM7L64-AU
• Description: MCU ARM7 64K HS FLASH 128-LQFP
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM7L64-AU

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 36MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LCD, POR, PWM, WDT
• Number Of I /o: 80
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 6K x 8
• Voltage - Supply (vcc/vdd): 1.55 V ~ 1.8 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 128-LQFP
• Controller Family/series: AT91SAM7xxx
• No. Of I/o's: 80
• Ram Memory Size: 6KB
• Cpu Speed: 36MHz
• No. Of Timers: 1
• Rohs Compliant: Yes
• Processor Series: AT91SAMx
• Core: ARM7TDMI
• Data Bus Width: 32 bit
• Data Ram Size: 6 KB
• Interface Type: 2-Wire, SPI, USART
• Maximum Clock Frequency: 36 MHz
• Number Of Programmable I/os: 80
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: AT91SAM-ICE, AT91-ISP, AT91SAM7L-EK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 4 Channel
• For Use With: AT91SAM7L-STK - KIT EVAL FOR AT91SAM7LAT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

34.3
Table 34-2.
34.4
34.4.1
34.4.2
34.4.3
34.4.4
6257A–ATARM–20-Feb-08
Name
SEG [39:0]
COM [9:0]
I/O Lines Description
Product Dependencies
I/O Lines
Power Management
Interrupt Sources
Number of Segments and Commons
I/O Lines Description
Description
Segments control signals
Commons control signals
The pins used for interfacing the SLCD Controller may be multiplexed with PIO lines. Please
refer to product block diagram.
In this case, the assignment of the segment controls and commons are automatically done
depending on COMSEL and SEGSEL in SLCDC_MR. If I/O lines of the SLCD Controller are not
used by the application, they can be used for other purposes by the PIO Controller.
The SLCD Controller is clocked by the slow clock (SCLK). All the timings are based upon a typi-
cal value of 32 kHz for SCLK. The power management of the SLCD controller is handled by the
Shutdown Controller.
The SLCD Controller is supplied by 3V domain.
The SLCD Controller interrupt line is connected to one of the internal sources of the Advanced
Interrupt Controller. Using the SLCD Controller interrupt requires prior programming of the AIC.
The product, embeds 40 segments and 10 Commons.
AT91SAM7L128/64 Preliminary
Type
Output
Output
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