DSPIC30F6014A-30I/PT Microchip Technology, DSPIC30F6014A-30I/PT Datasheet - Page 229

• Manufacturer Part Number: DSPIC30F6014A-30I/PT
• Description: IC DSPIC MCU/DSP 144K 80TQFP
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F6014A-30I/PT

• Program Memory Type: FLASH
• Program Memory Size: 144KB (48K x 24)
• Package / Case: 80-TFQFP
• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 30 MIPs
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: AC'97, Brown-out Detect/Reset, I²S, LVD, POR, PWM, WDT
• Number Of I /o: 68
• Eeprom Size: 4K x 8
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 16x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Product: DSCs
• Data Bus Width: 16 bit
• Processor Series: DSPIC30F
• Core: dsPIC
• Maximum Clock Frequency: 30 MHz
• Number Of Programmable I/os: 68
• Data Ram Size: 8 KB
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE4000, DM240002, DM330011
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DM300024 - KIT DEMO DSPICDEM 1.1XLT80PT3 - SOCKET TRAN ICE 80MQFP/TQFPAC164320 - MODULE SKT MPLAB PM3 80TQFPDM300004-2 - BOARD DEMO DSPICDEM.NET 2DM300004-1 - BOARD DEMO DSPICDEM.NET 1AC30F007 - MODULE SKT FOR DSPIC30F 80TQFPDV164005 - KIT ICD2 SIMPLE SUIT W/USB CABLE
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: DSPIC30F6014A30IP

INDEX
A
AC Characteristics ............................................................ 184
AC Temperature and Voltage Specifications .................... 184
AC-Link Mode Operation .................................................. 130
ADC .................................................................................. 133
ADC Conversion Speeds .................................................. 136
Address Generator Units .................................................... 39
Alternate Vector Table ........................................................ 49
Analog-to-Digital Converter. See ADC.
Assembler
Automatic Clock Stretch...................................................... 98
B
Band Gap Start-up Time
Barrel Shifter ....................................................................... 23
Bit-Reversed Addressing .................................................... 42
Block Diagrams
© 2006 Microchip Technology Inc.
Internal FRC Jitter, Accuracy and Drift ..................... 187
Internal LPRC Accuracy............................................ 188
Load Conditions ........................................................ 184
16-bit Mode ............................................................... 130
20-bit Mode ............................................................... 130
Aborting a Conversion .............................................. 135
ADCHS Register ....................................................... 133
ADCON1 Register..................................................... 133
ADCON2 Register..................................................... 133
ADCON3 Register..................................................... 133
ADCSSL Register ..................................................... 133
ADPCFG Register..................................................... 133
Configuring Analog Port Pins.............................. 64, 140
Connection Considerations....................................... 140
Conversion Operation ............................................... 134
Effects of a Reset...................................................... 139
Operation During CPU Idle Mode ............................. 139
Operation During CPU Sleep Mode.......................... 139
Output Formats ......................................................... 139
Power-down Modes .................................................. 139
Programming the Start of Conversion Trigger .......... 135
Register Map............................................................. 141
Result Buffer ............................................................. 134
Sampling Requirements............................................ 138
Selecting the Conversion Clock ................................ 135
Selecting the Conversion Sequence......................... 134
MPASM Assembler................................................... 172
During 10-bit Addressing (STREN = 1)....................... 98
During 7-bit Addressing (STREN = 1)......................... 98
Receive Mode ............................................................. 98
Transmit Mode ............................................................ 98
Requirements............................................................ 191
Timing Characteristics .............................................. 191
Example ...................................................................... 43
Implementation ........................................................... 42
Modifier Values Table ................................................. 43
Sequence Table (16-Entry)......................................... 43
12-bit ADC Functional............................................... 133
16-bit Timer1 Module .................................................. 70
16-bit Timer2............................................................... 75
16-bit Timer3............................................................... 75
16-bit Timer4............................................................... 80
16-bit Timer5............................................................... 80
32-bit Timer2/3............................................................ 74
32-bit Timer4/5............................................................ 79
CAN Buffers and Protocol Engine............................. 112
dsPIC30F6011A/6012A/6013A/6014A
Preliminary
BOR. See Brown-out Reset.
Brown-out Reset ............................................................... 143
C
C Compilers
CAN Module ..................................................................... 111
CLKOUT and I/O Timing
Code Examples
Code Protection ................................................................ 143
Core Architecture
CPU Architecture Overview ................................................ 15
Customer Change Notification Service............................. 233
Customer Notification Service .......................................... 233
Customer Support............................................................. 233
D
Data Accumulators and Adder/Subtractor .......................... 21
Data Address Space........................................................... 31
DCI Module............................................................... 124
Dedicated Port Structure ............................................ 63
DSP Engine ................................................................ 20
dsPIC30F6011A/6012A .............................................. 10
dsPIC30F6013A/6014A .............................................. 11
External Power-on Reset Circuit .............................. 156
I
Input Capture Mode.................................................... 83
Oscillator System...................................................... 145
Output Compare Mode ............................................... 87
Reset System ........................................................... 153
Shared Port Structure................................................. 64
SPI.............................................................................. 92
SPI Master/Slave Connection..................................... 92
UART Receiver......................................................... 104
UART Transmitter..................................................... 103
Characteristics.................................................. 182, 183
Timing Requirements ............................................... 190
MPLAB C18.............................................................. 172
MPLAB C30.............................................................. 172
Baud Rate Setting .................................................... 116
CAN1 Register Map.................................................. 118
CAN2 Register Map.................................................. 120
Frame Types ............................................................ 111
I/O Timing Characteristics ........................................ 209
I/O Timing Requirements.......................................... 209
Message Reception.................................................. 114
Message Transmission............................................. 115
Modes of Operation .................................................. 113
Overview................................................................... 111
Characteristics.......................................................... 188
Requirements ........................................................... 188
Data EEPROM Block Erase ....................................... 58
Data EEPROM Block Write ........................................ 60
Data EEPROM Read.................................................. 57
Data EEPROM Word Erase ....................................... 58
Data EEPROM Word Write ........................................ 59
Erasing a Row of Program Memory ........................... 53
Initiating a Programming Sequence ........................... 54
Loading Write Latches ................................................ 54
Overview..................................................................... 15
Data Space Write Saturation ...................................... 23
Overflow and Saturation ............................................. 21
Round Logic ............................................................... 22
Write Back .................................................................. 22
Alignment.................................................................... 34
Alignment (Figure) ...................................................... 35
Effect of Invalid Memory Accesses (Table) ................ 34
2
C .............................................................................. 96
DS70143C-page 227