M30622SAFP#U5 Renesas Electronics America, M30622SAFP#U5 Datasheet - Page 372

• Manufacturer Part Number: M30622SAFP#U5
• Description: IC M16C MPU ROMLESS 100QFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/60r

Specifications of M30622SAFP#U5

• Core Processor: M16C/60
• Core Size: 16-Bit
• Speed: 16MHz
• Connectivity: SIO, UART/USART
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 50
• Program Memory Type: ROMless
• Ram Size: 3K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 10x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 100-QFP
• For Use With: 867-1000 - KIT QUICK START RENESAS 62PM3062PT3-CPE-3 - EMULATOR COMPACT M16C/62P/30P
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Clock-Synchronous Serial I/O
(b) Function for choosing polarity
(c) Function for choosing which bit to transmit first
(d) Function for choosing successive reception mode
(e) Function for outputting transfer clock to multiple pins
(f) Data logic select function
(g) Function for choosing a transmission interrupt factor
(h) TxD, RxD I/O polarity reverse function
The clock-synchronous serial I/O has three types of CTS/RTS functions to choose from:
• CTS/RTS functions disabled
• CTS function only enabled
• RTS function only enabled
This function switches the polarity of the transfer clock. The following operations are available:
• Data is input at the falling edge of the transfer clock, and is output at the rising edge.
• Data is input at the rising edge of the transfer clock, and is output at the falling edge.
This function is to choose whether to transmit data from bit 0 or from bit 7. Choose either of the
following:
• LSB first
• MSB first
Successive reception mode is a mode in which reading the receive buffer register makes the recep-
tion-enabled status ready. In this mode, there is no need to write dummy data to the transmit buffer
register so as to make the reception-enabled status ready. But at the time of starting reception, read
the receive buffer register into a dummy manner.
• Normal mode
• Successive reception mode
This function is to switch among pins to output the transfer clock. This function is effective only when
selecting the internal clock. Switching among pins for outputting the transfer clock allows data trans-
mission to two external ICs in a time-sharing manner.
This function is to reserve data when writing to transmit buffer register or reading from receive buffer register.
The timing to generate a transmission interrupt can be selected from the following: the instant the
transmission buffer is emptied or the instant the transmission register is emptied. When transmis-
sion buffer empty timing is selected, an interrupt occurs when transmitted data is moved from the
transmission buffer to the transmission register. Therefore, data can be transmitted in succession.
When transmission register empty timing is selected, an interrupt occurs when data transmission is
complete.
This function is to reserve a polarity of TxD port output level and a polarity of RxD port input level.
_______ _______
_______
_______
Data is transmitted from bit 0.
Data is transmitted from bit 7.
Writing dummy data to the transmit buffer register makes the
reception enabled status ready.
Reading the reception buffer register makes the reception-enabled
status ready.
_______ _______
CTS/RTS pin is a programmable I/O port.
_______ _______
CTS/RTS pin performs the CTS function.
_______ _______
CTS/RTS pin performs the RTS function.
_______ _______
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
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M16C / 62A Group
Mitsubishi microcomputers
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