M30622SAFP#U5 Renesas Electronics America, M30622SAFP#U5 Datasheet - Page 533

IC M16C MPU ROMLESS 100QFP

M30622SAFP#U5

Manufacturer Part Number
M30622SAFP#U5
Description
IC M16C MPU ROMLESS 100QFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/60r
Datasheets

Specifications of M30622SAFP#U5

Core Processor
M16C/60
Core Size
16-Bit
Speed
16MHz
Connectivity
SIO, UART/USART
Peripherals
DMA, PWM, WDT
Number Of I /o
50
Program Memory Type
ROMless
Ram Size
3K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 10x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
100-QFP
For Use With
867-1000 - KIT QUICK START RENESAS 62PM3062PT3-CPE-3 - EMULATOR COMPACT M16C/62P/30P
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

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2-214
Controlling Power Applications
Figure 3.7.3. Set-up procedure of controlling power using stop mode (1)
b7
Setting operation clock after returning from stop mode
0
b7
b7
b7
Initial condition
Setting interrupt except stop mode cancel
Canceling protect
b7
All clocks off (stop mode)
b7
(When operating with X
As this register becomes setting mentioned above when
operating with X
the user does not need to set it again.
Interrupt enable flag (I flag)
I
nterrupt control register TBiIC(i=3 to 5) [Address 0045
0
1
0 0 0 0
0
0
IN
0
(count source of BCLK is X
0
0
b0
b0
0
b0
1
b0
b0
0
b0
1
Interrupt priority level select bit
IN
Main clock (X
BCNIC
DMiIC(i=0, 1)
ADIC
SiTIC(i=0 to 2) [Address 0051
SiRIC(i=0 to 2) [Address 0052
TAiIC(i=0 to 4) [Address 0055
TBiIC(i=0 to 2) [Address 005A
System clock select bit
System clock control register 0
[Address 0006
CM0
P10
Key scan data
000 : Interrupt disabled
Pull-up control register 2
[Address 03FE
PUR2
On
X
Port P10 register
[Address 03F4
P10
Protect register [Address 000A
PRCR
Enables writing to system clock control registers 0 and 1
(addresses 0006
after returning)
System clock control register 1 [Address 0007
CM1
IN
All clock stop control bit
Reserved bit
1 : Write-enabled
1 : All clocks off (stop mode)
Must always be set to “0”
4
, X
to P10
OUT
7
IN
pulled high
16
-X
“1”
16
16
[Address 004A
[Address 004B
[Address 004E
]
OUT
]
]
16
IN
) stop bit
),
and 0007
16
16
16
16
16
16
16
16
16
16
, 0053
, 0054
to 0047
]
, 004C
]
)
to 0059
to 005C
]
NOP instruction X 4
16
16
16
16
, 004F
, 0050
16
]
16
]
]
]
Main
16
16
b7
16
As this register becomes setting mentioned above when operating with X
(count source of BCLK is X
When operating with X
clock select bit to “1”. The both bits cannot be set at the same time.
1
]
]
b7
b7
0
b7
(When operating with X
]
Processor interrupt priority level (IPL) = 0
Interrupt enable flag (I) =0
0
0
0
1
0
1
0
1
0
0
0
1
IN
, set port Xc select bit to “1” before setting system
b0
b0
0
b0
b0
1
1
Key input interrupt request generation
CIN
CIN
Interrupt priority level select bit
Reserved bit
Interrupt priority level select bit
INTiIC(i=0 to 2)
Key scan output port
Key scan input port
Port X
000 : Interrupt disabled
Must always be set to “0”
System clock select bit
System clock control register 0
[Address 0006
CM0
), the user does not need to set it again.
Key input interrupt control register
[Address 004D
KUPIC
Port P10 direction register
[Address 03F6
PD10
X
X
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Set higher value than the present IPL
after returning)
CIN
CIN
, X
C
-X
select bit
COUT
COUT
generation
16
16
16
]
[Address 005D
]
]
M16C / 62A Group
16
Mitsubishi microcomputers
to 005F
16
CIN
]

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