MCF5249LAG120 Freescale Semiconductor, MCF5249LAG120 Datasheet - Page 4

• Manufacturer Part Number: MCF5249LAG120
• Description: IC MPU 32BIT COLDF 144-LQFP
• Manufacturer: Freescale Semiconductor
• Series: MCF524xr

Specifications of MCF5249LAG120

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 120MHz
• Connectivity: I²C, IDE, MMC, SPI, UART/USART
• Peripherals: DMA, I²S, POR, Serial Audio, WDT
• Number Of I /o: 34
• Program Memory Type: ROMless
• Ram Size: 96K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 4x12b
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 144-LQFP
• Family Name: MCF5xxx
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 120MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 1.8V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 144
• Package Type: LQFP
• Maximum Clock Frequency: 120 MHz
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: 0 C
• Program Memory Size: 8KB
• Cpu Speed: 120MHz
• Embedded Interface Type: I2C, QSPI, UART
• Digital Ic Case Style: LQFP
• No. Of Pins: 144
• Rohs Compliant: Yes
• For Use With: M5249C3 - KIT EVAL FOR M5249 W/ETHERNET
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Compliant

MCF5249 Features: Details
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The primary features of the MCF5249 integrated processor include the following:
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ColdFire V2 Processor Core operating at 140 MHz
— Clock-doubled Version 2 microprocessor core
— 32-bit internal data bus, 16 bit external data bus
— 16 user-visible, 32-bit general-purpose registers
— Supervisor/user modes for system protection
— Vector base register to relocate exception-vector table
— Optimized for high-level language constructs
DMA controller
— Four fully programmable channels: Two dedicated to the audio interface module and two
— Supports dual- and single-address transfers with 32-bit data capability
— Two address pointers that can increment or remain constant
— 16-/24-bit transfer counter
— Operand packing and unpacking support
— Auto-alignment transfers supported for efficient block movement
— Supports bursting and cycle stealing
— All channels support memory to memory transfers
— Interrupt capability
— Provides two clock cycle internal access
— Single-cycle multiply-accumulate operations for 32 x 32 bit and 16 x 16 bit operands
— Support for signed, unsigned, integer, and fixed-point fractional input operands
— Four 48-bit accumulators to allow the use of a 40-bit product
— The addition of 8 extension bits to increase the dynamic number range
— Fast signed and unsigned integer multiplies
8-Kbyte Direct Mapped instruction cache
— Clocked core clock frequency
— Flush capability
— Non-blocking cache provides fast access to critical code and data
96-Kbyte SRAM
— Provides one-cycle access to critical code and data
— Split into two banks, SRAM0 (32K), and SRAM1 (64K)
— DMA requests to/from internal SRAM1 supported
Crystal Trim
— The XTRIM output can be used to trim an external crystal oscillator circuit which would allow
Enhanced Multiply-accumulator Unit
MCF5249 Features: Details
dedicated to the UART module (External requests are not supported.)
lock with an incoming IEC958 or serial audio signal
MCF5249 Integrated ColdFire® Microprocessor Product Brief
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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