MC908AZ60AVFUR2 Freescale Semiconductor, MC908AZ60AVFUR2 Datasheet - Page 95

IC MCU 61K FLASH 8.4MHZ 64-QFP

MC908AZ60AVFUR2

Manufacturer Part Number
MC908AZ60AVFUR2
Description
IC MCU 61K FLASH 8.4MHZ 64-QFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC908AZ60AVFUR2

Core Processor
HC08
Core Size
8-Bit
Speed
8.4MHz
Connectivity
CAN, SCI, SPI
Peripherals
LVD, POR, PWM
Number Of I /o
52
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 15x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
64-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
MC908AZ60AVFUR2TR

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC908AZ60AVFUR2
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
7.5.3 EEPROM-2 Nonvolatile Register
The contents of this register is loaded into the EEPROM-2 array configuration register (EE2ACR) after a
reset.
This register is erased and programmed in the same way as an EEPROM byte. (See
Control Register
7.5.4 EEPROM-2 Timebase Divider Register
The 16-bit EEPROM-2 timebase divider register consists of two 8-bit registers: EE2DIVH and EE2DIVL.
The 11-bit value in this register is used to configure the timebase divider circuit to obtain the 35 μs
timebase for EEPROM-2 control.
These two read/write registers are respectively loaded with the contents of the EEPROM-2 timebase
divider nonvolatile registers (EE2DIVHNVR and EE2DIVLNVR) after a reset.
Freescale Semiconductor
Address:
Address:
Address:
The EE2NVR will leave the factory programmed with $F0 such that the full
array is available and unprotected.
Reset:
Reset:
Reset:
Read:
Read:
Read:
Write:
Write:
Write:
for individual bit descriptions).
MC68HC908AZ60A • MC68HC908AS60A • MC68HC908AS60E Data Sheet, Rev. 6
PV = Programmed value or 1 in the erased state.
UNUSED
EEDIVS-
EEDIV7
$FF7C
$FF7A
$FF7B
Figure 7-4. EEPROM-2 Nonvolatile Register (EE2NVR)
ECD
Bit 7
Bit 7
Bit 7
Figure 7-5. EE2DIV Divider High Register (EE2DIVH)
Figure 7-6. EE2DIV Divider Low Register (EE2DIVL)
= Unimplemented
UNUSED
EEDIV6
6
6
0
6
UNUSED
EEDIV5
Contents of EE2DIVHNVR ($FF70); Bits[6:3] = 0
5
5
0
5
Contents of EE2DIVLNVR ($FF71)
EEPRTCT
NOTE
EEDIV4
4
4
0
4
PV
EEDIV3
EEBP3
3
3
0
3
EEDIV10
EEDIV2
EEBP2
2
2
2
EEPROM-2 Register Descriptions
EEDIV9
EEDIV1
EEBP1
1
1
1
EEDIV8
EEDIV0
7.5.1 EEPROM-2
EEBP0
Bit 0
Bit 0
Bit 0
95

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