ST7FLITE02Y0B6 STMicroelectronics, ST7FLITE02Y0B6 Datasheet - Page 84

• Manufacturer Part Number: ST7FLITE02Y0B6
• Description: MCU 8BIT 1.5K FLASH 16DIP
• Manufacturer: STMicroelectronics
• Series: ST7r

Specifications of ST7FLITE02Y0B6

• Core Processor: ST7
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 13
• Program Memory Size: 1.5KB (1.5K x 8)
• Program Memory Type: FLASH
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 16-DIP (0.300", 7.62mm)
• Processor Series: ST7FLITE0x
• Core: ST7
• Data Bus Width: 8 bit
• Data Ram Size: 128 B
• Interface Type: SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 13
• Number Of Timers: 2
• Operating Supply Voltage: 2.4 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• Development Tools By Supplier: ST7FLIT0-IND/USB, ST7FLITE-SK/RAIS, ST7MDT10-DVP3, ST7MDT10-EMU3, STX-RLINK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit
• For Use With: 497-5858 - EVAL BOARD PLAYBACK ST7FLITE497-5049 - KIT STARTER RAISONANCE ST7FLITE
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details
• Other names: 497-4852

ST7LITE0xY0, ST7LITESxY0
13.3.2 Operating Conditions with Low Voltage Detector (LVD)
T
Notes:
1. Not tested in production.
2. Not tested in production. The V
When the V
13.3.3 Auxiliary Voltage Detector (AVD) Thresholds
T
84/124
1
V
V
V
Vt
t
I
V
V
V
∆V
A
A
g(VDD)
DD(LVD
Symbol
Symbol
IT+
IT-
hys
IT+
IT-
hys
POR
= -40 to 85°C, unless otherwise specified
= -40 to 85°C, unless otherwise specified
IT-
(LVD)
(AVD)
(LVD)
(AVD)
)
DD
Reset release threshold
(V
Reset generation threshold
(V
LVD voltage threshold hysteresis
V
Filtered glitch delay on V
LVD/AVD current consumption
1=>0 AVDF flag toggle threshold
(V
0=>1 AVDF flag toggle threshold
(V
AVD voltage threshold hysteresis
Voltage drop between AVD flag set
and LVD reset activation
DD
slope is outside these values, the LVD may not ensure a proper reset of the MCU.
DD
DD
DD
DD
rise time rate
rise)
fall)
rise)
fall)
Parameter
Parameter
2)
DD
rise time rate condition is needed to ensure a correct device power-on and LVD reset.
DD
High Threshold
Med. Threshold
Low Threshold
High Threshold
Med. Threshold
Low Threshold
V
Not detected by the LVD
High Threshold
Med. Threshold
Low Threshold
High Threshold
Med. Threshold
Low Threshold
V
V
IT+
IT+
DD
(LVD)
(AVD)
fall
Conditions
Conditions
-V
-V
IT-
IT-
(LVD)
(AVD)
4.00
3.40
2.65
3.80
3.20
2.40
4.40
3.90
3.20
4.30
3.70
2.90
Min
Min
20
1)
1)
1)
Typ
Typ
4.25
3.60
2.90
4.05
3.40
2.70
4.70
4.10
3.40
4.60
3.90
3.20
0.45
200
220
150
4.30
3.65
2.90
20000
Max
Max
4.50
3.80
3.15
5.00
4.30
3.60
4.90
4.10
3.40
150
1)
1)
1)
µs/V
Unit
Unit
mV
mV
µA
ns
V
V
V