MC9S08QG4CFQE Freescale Semiconductor, MC9S08QG4CFQE Datasheet - Page 167

• Manufacturer Part Number: MC9S08QG4CFQE
• Description: IC MCU 4K FLASH 8MHZ 8-QFN-D
• Manufacturer: Freescale Semiconductor
• Series: HCS08r

Specifications of MC9S08QG4CFQE

• Core Processor: HCS08
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 4
• Program Memory Size: 4KB (4K x 8)
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-DFN
• Processor Series: S08QG
• Core: HCS08
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: SCI/SPI
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 4
• Number Of Timers: 1
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWS08
• Development Tools By Supplier: DEMO9S08QG8E
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 4-ch x 10-bit
• Package: 8DFN EP
• Family Name: HCS08
• Maximum Speed: 20 MHz
• Lead Free Status / RoHS Status: Request inventory verification / Request inventory verification
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

11.4
This section provides a complete functional description of the IIC module.
11.4.1
The IIC bus system uses a serial data line (SDA) and a serial clock line (SCL) for data transfer. All devices
connected to it must have open drain or open collector outputs. A logic AND function is exercised on both
lines with external pull-up resistors. The value of these resistors is system dependent.
Normally, a standard communication is composed of four parts:
The STOP signal should not be confused with the CPU STOP instruction. The IIC bus system
communication is described briefly in the following sections and illustrated in
Freescale Semiconductor
SDA
SCL
SDA
SCL
•
•
•
•
SIGNAL
SIGNAL
START
START
START signal
Slave address transmission
Data transfer
STOP signal
MSB
MSB
AD7 AD6 AD5 AD4 AD3 AD2 AD1 R/W
Functional Description
AD7 AD6 AD5 AD4 AD3 AD2 AD1 R/W
1
1
IIC Protocol
2
2
CALLING ADDRESS
CALLING ADDRESS
3
3
4
4
5
5
6
6
MC9S08QG8 and MC9S08QG4 Data Sheet, Rev. 5
Figure 11-8. IIC Bus Transmission Signals
7
7
READ/
WRITE
READ/
WRITE
LSB
LSB
8
8
ACK
ACK
BIT
BIT
9
9
XX
REPEATED
SIGNAL
XXX
START
MSB
MSB
AD7 AD6 AD5 AD4 AD3 AD2 AD1 R/W
D7
1
1
D6
2
2
NEW CALLING ADDRESS
D5
3
3
DATA BYTE
D4
4
4
D3
5
5
D2
6
6
D1
7
7
Inter-Integrated Circuit (S08IICV1)
Figure
READ/
WRITE
LSB
LSB
D0
8
8
ACK
BIT
NO
ACK
NO
BIT
9
9
11-8.
SIGNAL
SIGNAL
STOP
STOP
165