MCHC908QT2CDWE Freescale Semiconductor, MCHC908QT2CDWE Datasheet - Page 32

• Manufacturer Part Number: MCHC908QT2CDWE
• Description: IC MCU 1.5K FLASH W/ADC 8-SOIC
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MCHC908QT2CDWE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Peripherals: LVD, POR, PWM
• Number Of I /o: 5
• Program Memory Size: 1.5KB (1.5K x 8)
• Program Memory Type: FLASH
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 4x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-SOIC (5.3mm Width), 8-SOP, 8-SOEIAJ
• Processor Series: HC08QT
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 128 B
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 6
• Number Of Timers: 2
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, M68CBL05AE, DEMO908QB8, DEMO908QC16
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit, 4 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Connectivity: -
• Lead Free Status / Rohs Status: Details

Memory
2.5 Random-Access Memory (RAM)
Addresses $0080–$00FF are RAM locations. The location of the stack RAM is programmable. The 16-bit
stack pointer allows the stack to be anywhere in the 64-Kbyte memory space.
Before processing an interrupt, the central processor unit (CPU) uses five bytes of the stack to save the
contents of the CPU registers.
During a subroutine call, the CPU uses two bytes of the stack to store the return address. The stack
pointer decrements during pushes and increments during pulls.
32
For correct operation, the stack pointer must point only to RAM locations.
For M6805, M146805, and M68HC05 compatibility, the H register is not
stacked.
Be careful when using nested subroutines. The CPU may overwrite data in
the RAM during a subroutine or during the interrupt stacking operation.
Vector Priority
Highest
Lowest
Vector
MC68HC908QY/QT Family Data Sheet, Rev. 6
IF15
IF14
IF13
IF6
IF5
IF4
IF3
IF2
IF1
—
—
↓
Table 2-1. Vector Addresses
Address
$FFDE
$FFDF
$FFFB
$FFFC
$FFFD
$FFFE
$FFE0
$FFE1
$FFF2
$FFF3
$FFF4
$FFF5
$FFF6
$FFF7
$FFFA
$FFFF
—
—
NOTE
NOTE
NOTE
ADC conversion complete vector (high)
ADC conversion complete vector (low)
Keyboard vector (high)
Keyboard vector (low)
Not used
TIM overflow vector (high)
TIM overflow vector (low)
TIM Channel 1 vector (high)
TIM Channel 1 vector (low)
TIM Channel 0 vector (high)
TIM Channel 0 vector (low)
Not used
IRQ vector (high)
IRQ vector (low)
SWI vector (high)
SWI vector (low)
Reset vector (high)
Reset vector (low)
.
Vector
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