DF2378BVFQ35WV Renesas Electronics America, DF2378BVFQ35WV Datasheet - Page 1030
DF2378BVFQ35WV
Manufacturer Part Number
DF2378BVFQ35WV
Description
IC H8S/2378 MCU FLASH 144-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheet
1.YR0K42378FC000BA.pdf
(1208 pages)
Specifications of DF2378BVFQ35WV
Core Processor
H8S/2000
Core Size
16-Bit
Speed
35MHz
Connectivity
I²C, IrDA, SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
97
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 6x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-QFP
For Use With
EDK2378 - DEV EVAL KIT FOR H8S/2378
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
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Part Number:
DF2378BVFQ35WV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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Section 23 Clock Pulse Generator
23.5
23.5.1
1. The following points should be noted since the frequency of φ changes according to the
2. All the on-chip peripheral modules operate on the φ. Therefore, note that the time processing
3. Note that the frequency of φ will be changed when setting SCKCR or PLLCR while executing
23.5.2
Since various characteristics related to the resonator are closely linked to the user’s board design,
thorough evaluation is necessary on the user’s part, using the resonator connection examples
shown in this section as a guide. As the parameters for the oscillation circuit will depend on the
floating capacitance of the resonator and the user board, the parameters should be determined in
consultation with the resonator manufacturer. The design must ensure that a voltage exceeding the
maximum rating is not applied to the resonator pin.
Rev.7.00 Mar. 18, 2009 page 962 of 1136
REJ09B0109-0700
settings of SCKCR and PLLCR.
Select a clock division ratio that is within the operation guaranteed range of clock cycle time
tcyc shown in the AC timing of the Electrical Characteristics. In other words, φ must be set to
a value between 8 MHz (minimum) and 33 MHz * (maximum). The setting of φ must not be
less than 8 MHz or greater than 33 MHz * .
Note: * 35 MHz for the H8S/2378
of modules such as a timer and SCI differ before and after changing the clock division ratio. In
addition, wait time for clearing software standby mode differs by changing the clock division
ratio. See the description, Setting Oscillation Stabilization Time after Clearing Software
Standby Mode in section 24.2.3, Software Standby Mode, for details.
the external bus cycle with the write-data-buffer function.
Usage Notes
Notes on Clock Pulse Generator
Notes on Resonator
34 MHz for the H8S/2378R, H8S/2374, H8S/2372, H8S/2371, H8S/2370,
H8S/2374R, H8S/2372R, H8S/2371R, and H8S/2370R
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