PIC12C672T-04I/SM Microchip Technology, PIC12C672T-04I/SM Datasheet - Page 231

• Manufacturer Part Number: PIC12C672T-04I/SM
• Description: IC MCU OTP 2KX14 A/D 8-SOIJ
• Manufacturer: Microchip Technology
• Series: PIC® 12Cr

Specifications of PIC12C672T-04I/SM

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 4MHz
• Peripherals: POR, WDT
• Number Of I /o: 5
• Program Memory Size: 3.5KB (2K x 14)
• Program Memory Type: OTP
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 4x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-SOIC (5.3mm Width), 8-SOP, 8-SOEIAJ
• For Use With: XLT08SO-1 - SOCKET TRANSITION 8SOIC 150/208AC164312 - MODULE SKT FOR PM3 16SOIC309-1048 - ADAPTER 8-SOIC TO 8-DIP309-1047 - ADAPTER 8-SOIC TO 8-DIP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Connectivity: -

15.3.5
SS
SCK (CKP = 0,
SCK (CKP = 1,
Write to
SSPBUF
SDO
SDI
(SMP = 0)
Input
Sample (SMP = 0)
optional
SSPIF
SSPSR to
SSPBUF
1997 Microchip Technology Inc.
CKE = 0)
CKE = 0)
Slave Operation
In slave mode, the data is transmitted and received as the external clock pulses appear on SCK.
When the last bit is latched, the interrupt flag bit SSPIF is set.
The clock polarity is selected by appropriately programming bit CKP (SSPCON<4>). This then
would give waveforms for SPI communication as shown in
Figure 15-5
the minimum high and low times.
In sleep mode, the slave can transmit and receive data. When a byte is received, the device will
wake-up from sleep, if the interrupt is enabled.
Figure 15-4:
bit7
bit7
where the MSb is transmitted first. When in slave mode the external clock must meet
SPI Mode Waveform (Slave Mode With CKE = 0)
bit6
bit5
bit4
bit3
Section 15. SSP
bit2
Figure
bit1
15-3,
bit0
DS31015A-page 15-11
bit0
Figure
Next Q4 Cycle
after Q2
15-4, and
15