ATMEGA8535L-8JUR Atmel, ATMEGA8535L-8JUR Datasheet - Page 42

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ATMEGA8535L-8JUR

Manufacturer Part Number
ATMEGA8535L-8JUR
Description
MCU AVR 8K FLASH 8MHZ 44PLCC
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheet

Specifications of ATMEGA8535L-8JUR

Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATMEGA8535L-8JUR
Manufacturer:
Atmel
Quantity:
10 000
Watchdog Timer Control
Register – WDTCR
42
ATmega8535(L)
Table 17. WDT Configuration as a Function of the Fuse Settings of S8538C and
WDTON
Figure 21. Watchdog Timer
• Bits 7..5 – Res: Reserved Bits
These bits are reserved bits in the ATmega8535 and will always read as zero.
• Bit 4 – WDCE: Watchdog Change Enable
This bit must be set when the WDE bit is written to logic zero. Otherwise, the Watchdog
will not be disabled. Once written to one, hardware will clear this bit after four clock
cycles. Refer to the description of the WDE bit for a Watchdog disable procedure. In
Safety Level 1 and 2, this bit must also be set when changing the prescaler bits. See
“Timed Sequences for Changing the Configuration of the Watchdog Timer” on page 45.
• Bit 3 – WDE: Watchdog Enable
When the WDE is written to logic one, the Watchdog Timer is enabled, and if the WDE is
written to logic zero, the Watchdog Timer function is disabled. WDE can only be cleared
Bit
Read/Write
Initial Value
S8535C
Unprogrammed
Unprogrammed
Programmed
Programmed
R
7
0
WDTON
Unprogrammed
Programmed
Unprogrammed
Programmed
OSCILLATOR
WATCHDOG
R
6
0
R
5
0
Safety
Level
1
2
0
2
WDCE
R/W
4
0
WDT Initial
State
Disabled
Enabled
Disabled
Enabled
WDE
R/W
3
0
WDP2
R/W
2
0
How to Disable
the WDT
Timed
sequence
Always enabled
Timed
sequence
Always enabled
WDP1
R/W
1
0
WDP0
R/W
0
0
2502K–AVR–10/06
How to
Change
Time-out
Timed
sequence
Timed
sequence
No
restriction
Timed
sequence
WDTCR

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