ATA6617-P3QW Atmel, ATA6617-P3QW Datasheet - Page 187

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ATA6617-P3QW

Manufacturer Part Number
ATA6617-P3QW
Description
MCU W/LIN TX/5V REG/WTCDG 38VQFN
Manufacturer
Atmel
Series
AVR® ATA66 LIN-SBCr
Datasheet

Specifications of ATA6617-P3QW

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, LIN, SPI, UART/USART, USI
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
16
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
38-VQFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATA6617-P3QW
Manufacturer:
ATMEL
Quantity:
3 500
Part Number:
ATA6617-P3QW
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
4.16.3
4.16.3.1
4.16.3.2
Figure 4-70. Structure of a LIN Frame
9132D–AUTO–12/10
LIN Protocol
BREAK
Master and Slave
Frames
Break Delimiter
Field
HEADER
A LIN cluster consists of one master task and several slave tasks. A master node contains the
master task as well as a slave task. All other nodes contain a slave task only.
Figure 4-68. LIN Cluster with One Master Node and “n” Slave Nodes
The master task decides when and which frame shall be transferred on the bus. The slave
tasks provide the data transported by each frame. Both the master task and the slave task are
parts of the Frame handler
A frame consists of a header (provided by the master task) and a response (provided by a
slave task).
The header consists of a BREAK and SYNC pattern followed by a PROTECTED IDENTIFIER.
The identifier uniquely defines the purpose of the frame. The slave task appointed for provid-
ing the response associated with the identifier transmits it. The response consists of a DATA
field and a CHECKSUM field.
Figure 4-69. Master and Slave Tasks Behavior in LIN Frame
The slave tasks waiting for the data associated with the identifier receives the response and
uses the data transported after verifying the checksum.
Slave Task 1
Slave Task 2
SYNC
Master Task
Field
PROTECTED
IDENTIFIER
master node
HEADER
master task
slave task
Response Space
Field
FRAME SLOT
DATA-0
RESPONSE
slave node
Field
slave task
LIN bus
1
Atmel ATA6616/ATA6617
RESPONSE
Each byte field is transmitted as a serial byte, LSB first.
DATA-n
HEADER
Inter-Byte Space
Field
slave node
slave task
n
CHECKSUM
RESPONSE
Field
Inter-Frame Space
187

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