ATTINY24-15SSZ Atmel, ATTINY24-15SSZ Datasheet - Page 102

• Manufacturer Part Number: ATTINY24-15SSZ
• Description: MCU AVR 2K FLASH 15MHZ 14-SOIC
• Manufacturer: Atmel
• Series: AVR® ATtinyr

Specifications of ATTINY24-15SSZ

• Package / Case: 14-SOIC (3.9mm Width), 14-SOL
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Operating Temperature: -40°C ~ 125°C
• Speed: 16MHz
• Number Of I /o: 12
• Eeprom Size: 128 x 8
• Core Processor: AVR
• Program Memory Type: FLASH
• Ram Size: 128 x 8
• Program Memory Size: 2KB (2K x 8)
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Connectivity: USI
• Core Size: 8-Bit
• Cpu Family: ATtiny
• Device Core: AVR
• Device Core Size: 8b
• Frequency (max): 16MHz
• Interface Type: SPI/UART
• Total Internal Ram Size: 128Byte
• # I/os (max): 12
• Number Of Timers - General Purpose: 2
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 2.7V
• On-chip Adc: 8-chx10-bit
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 14
• Package Type: SOIC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

14.8.1
14.9
14.9.1
14.9.2
102
Modes of Operation
Atmel ATtiny24/44/84 [Preliminary]
Compare Output Mode and Waveform Generation
Normal Mode
Clear Timer on Compare Match (CTC) Mode
The Waveform Generator uses the COM1x1:0 bits differently in normal, CTC, and PWM
modes. For all modes, setting the COM1x1:0 = 0 tells the Waveform Generator that no action
on the OC1x Register is to be performed on the next compare match. For compare output
actions in the non-PWM modes refer to
Table 14-2 on page
Table 14-3 on page
A change of the COM1x1:0 bit states will have an effect at the first compare match after the
bits are written. For non-PWM modes, the action can be forced to have immediate effect by
using the 1x strobe bits.
The mode of operation, i.e., the behavior of the timer/counter and the output compare pins, is
defined by the combination of the waveform generation mode (WGM13:0) and compare output
mode (COM1x1:0) bits. The compare output mode bits do not affect the counting sequence,
while the waveform generation mode bits do. The COM1x1:0 bits control whether the PWM
output generated should be inverted or not (inverted or non-inverted PWM). For non-PWM
modes, the COM1x1:0 bits control whether the output should be set, cleared or toggle at a
compare match
For detailed timing information refer to
The simplest mode of operation is the normal mode (WGM13:0 = 0). In this mode the counting
direction is always up (incrementing), and no counter clear is performed. The counter simply
overruns when it passes its maximum 16-bit value (max = 0xFFFF), and then restarts from the
bottom (0x0000). In normal operation, the timer/counter overflow flag (TOV1) will be set on the
same timer clock cycle on which the TCNT1 becomes zero. The TOV1 flag in this case
behaves like a 17th bit, except that it is only set, not cleared. However, when combined with
the timer overflow interrupt that automatically clears the TOV1 flag, the timer resolution can be
increased by software. There are no special cases to consider in the normal mode. A new
counter value can be written anytime.
The input capture unit is easy to use in normal mode. However, observe that the maximum
interval between the external events must not exceed the resolution of the counter. If the inter-
val between events is too long, the timer overflow interrupt or the prescaler must be used to
extend the resolution for the capture unit.
The output compare units can be used to generate interrupts at some given time. Using the
output compare to generate waveforms in normal mode is not recommended because this will
occupy too much CPU time.
In clear timer on compare, or CTC, mode (WGM13:0 = 4 or 12), the OCR1A or ICR1 register is
used to manipulate the counter resolution. In CTC mode, the counter is cleared to zero when
the counter value (TCNT1) matches either OCR1A (WGM13:0 = 4) or ICR1 (WGM13:0 = 12).
OCR1A or ICR1 define the top value for the counter, and hence also its resolution. This mode
allows greater control of the compare match output frequency. It also simplifies the operation
of counting external events.
(“Compare Match Output Unit” on page
112, and for phase correct and phase and frequency correct PWM refer to
113.
“Timer/Counter Timing Diagrams” on page
Table 14-1 on page
101)
112. For fast PWM mode refer to
7701D–AVR–09/10
109.