PIC18F25J11-I/SS Microchip Technology, PIC18F25J11-I/SS Datasheet - Page 106

• Manufacturer Part Number: PIC18F25J11-I/SS
• Description: IC PIC MCU FLASH 32K 2V 28-SSOP
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F25J11-I/SS

• Core Size: 8-Bit
• Program Memory Size: 32KB (16K x 16)
• Core Processor: PIC
• Speed: 48MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 16
• Program Memory Type: FLASH
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 2.15 V ~ 3.6 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SSOP
• Controller Family/series: PIC18
• No. Of I/o's: 16
• Ram Memory Size: 3.6875KB
• Cpu Speed: 48MHz
• No. Of Timers: 5
• Interface: EUSART, I2C, SPI
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3776 B
• Interface Type: EUSART, I2C, SPI
• Maximum Clock Frequency: 48 MHz
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DM183022, DM183032, DV164136, MA180023
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 10 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164322 - MODULE SOCKET MPLAB PM3 28/44QFN
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

PIC18F46J11 FAMILY
6.5.3
Depending on the application, good programming
practice may dictate that the value written to the
memory should be verified against the original value.
This should be used in applications where excessive
writes can stress bits near the specification limit.
6.5.4
If a write is terminated by an unplanned event, such as
loss of power or an unexpected Reset, the memory
location just programmed should be verified and
TABLE 6-2:
DS39932C-page 106
TBLPTRU
TBPLTRH Program Memory Table Pointer High Byte (TBLPTR<15:8>)
TBLPTRL Program Memory Table Pointer Low Byte (TBLPTR<7:0>)
TABLAT
INTCON
EECON2 Program Memory Control Register 2 (not a physical register)
EECON1
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used during Flash program memory access.
Name
WRITE VERIFY
UNEXPECTED TERMINATION OF
WRITE OPERATION
Program Memory Table Latch
GIE/GIEH PEIE/GIEL TMR0IE
Bit 7
—
—
REGISTERS ASSOCIATED WITH PROGRAM FLASH MEMORY
Bit 6
—
—
WPROG
bit 21
Bit 5
Program Memory Table Pointer Upper Byte (TBLPTR<20:16>)
INT0IE
FREE
Bit 4
WRERR
RBIE
Bit 3
reprogrammed if needed. If the write operation is
interrupted by a MCLR Reset or a WDT time-out Reset
during normal operation, the user can check the
WRERR bit and rewrite the location(s) as needed.
6.6
See Section 25.6 “Program Verification and Code
Protection” for details on code protection of Flash
program memory.
TMR0IF
WREN
Flash Program Operation During
Code Protection
Bit 2
INT0IF
Bit 1
WR
© 2009 Microchip Technology Inc.
Bit 0
RBIF
—
Values on
Reset
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