PIC16C432-E/SS Microchip Technology, PIC16C432-E/SS Datasheet - Page 49

• Manufacturer Part Number: PIC16C432-E/SS
• Description: IC MCU CMOS 8BIT 20MHZ 2K 20SSOP
• Manufacturer: Microchip Technology
• Series: PIC® 16Cr

Specifications of PIC16C432-E/SS

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: LIN (Local Interconnect Network)
• Peripherals: Brown-out Detect/Reset, POR, WDT
• Number Of I /o: 12
• Program Memory Size: 3.5KB (2K x 14)
• Program Memory Type: OTP
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 20-SSOP
• For Use With: XLT20SS-1 - SOCKET TRANSITION 18DIP 20SSOPAC164307 - MODULE SKT FOR PM3 28SSOPAC164029 - MODULE SKT PROMATEII 20DIP/SSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -

9.3
The PIC16C432 differentiates between various kinds of
RESET:
a)
b)
c)
d)
e)
f)
Some registers are not affected in any RESET condi-
tion. Their status is unknown on POR and unchanged
in any other RESET. Most other registers are RESET to
a “RESET state” on Power-on Reset, MCLR Reset,
FIGURE 9-6:
Note 1: This is a separate oscillator from the RC oscillator of the CLKIN pin.
V
2002 Microchip Technology Inc.
MCLR/
OSC1/
CLKIN
PP
V
pin
Power-on Reset (POR)
MCLR Reset during normal operation
MCLR Reset during SLEEP
WDT Reset (normal operation)
WDT wake-up (SLEEP)
Brown-out Reset (BOD)
DD
pin
RESET
On-chip
RC OSC
OST/PWRT
Brown-out
V
Module
Detect
DD
WDT
Reset
(1)
Rise
OST
SIMPLIFIED BLOCK DIAGRAM OF ON-CHIP RESET CIRCUIT
PWRT
10-bit Ripple-counter
10-bit Ripple-counter
WDT
Reset
Timeout
BODEN
Power-on Reset
External
Reset
SLEEP
Preliminary
Enable PWRT
Enable OST
WDT Reset and MCLR Reset during SLEEP. They are
not affected by a WDT wake-up, since this is viewed as
the resumption of normal operation. TO and PD bits are
set or cleared differently in different RESET situations,
as indicated in Table 9-4. These bits are used in soft-
ware to determine the nature of the RESET. See
Table 9-6 for a full description of RESET states of all
registers.
A simplified block diagram of the On-chip Reset Circuit
is shown in Figure 9-6.
The MCLR Reset path has a noise filter to detect and
ignore small pulses. See Table 12-6 for pulse width
specification.
See Table 9-3 for timeout situations.
PIC16C432
S
R
DS41140B-page 47
Q
Chip_Reset