PIC16C432-E/SS Microchip Technology, PIC16C432-E/SS Datasheet - Page 51

• Manufacturer Part Number: PIC16C432-E/SS
• Description: IC MCU CMOS 8BIT 20MHZ 2K 20SSOP
• Manufacturer: Microchip Technology
• Series: PIC® 16Cr

Specifications of PIC16C432-E/SS

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: LIN (Local Interconnect Network)
• Peripherals: Brown-out Detect/Reset, POR, WDT
• Number Of I /o: 12
• Program Memory Size: 3.5KB (2K x 14)
• Program Memory Type: OTP
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 20-SSOP
• For Use With: XLT20SS-1 - SOCKET TRANSITION 18DIP 20SSOPAC164307 - MODULE SKT FOR PM3 28SSOPAC164029 - MODULE SKT PROMATEII 20DIP/SSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -

9.4.5
On power-up, the timeout sequence is as follows: First
PWRT timeout is invoked after POR has expired, then
OST is activated. The total timeout will vary based on
oscillator configuration and PWRTE bit status. For
example, in RC mode with PWRTE bit erased (PWRT
disabled), there will be no timeout at all. Figure 9-8,
Figure 9-8 and Figure 9-9 depict timeout sequences.
Since the timeouts occur from the POR pulse, if MCLR
is kept low long enough, the timeouts will expire. Then
bringing MCLR high will begin execution immediately
(see Figure 9-8). This is useful for testing purposes or
to synchronize more than one PICmicro
ating in parallel.
Table 9-5 shows the RESET conditions for some spe-
cial registers, while Table 9-6 shows the RESET condi-
tions for all the registers.
TABLE 9-3:
TABLE 9-4:
Legend: x = unknown, u = unchanged
2002 Microchip Technology Inc.
Oscillator Configuration
POR
0
0
0
1
1
1
1
1
XT, HS, LP
TIMEOUT SEQUENCE
RC
BOR
X
X
X
0
1
1
1
1
TIMEOUT IN VARIOUS SITUATIONS
STATUS/PCON BITS AND THEIR SIGNIFICANCE
TO
1
0
X
X
0
0
u
1
72 ms + 1024 T
PWRTE = 0
PD
1
X
0
X
u
0
u
0
72 ms
®
device oper-
Power-on Reset
Illegal, TO is set on POR
Illegal, PD is set on POR
Brown-out Reset
WDT Reset
WDT Wake-up
MCLR Reset during normal operation
MCLR Reset during SLEEP
OSC
Power-up
Preliminary
PWRTE = 1
1024 T
9.4.6
The power control/status register, PCON (address
8Eh), has two bits.
Bit0 is BOR (Brown-out). BOR is unknown on Power-
on Reset. It must then be set by the user and checked
on subsequent RESETS to see if BOR = 0, indicating
that a brown-out has occurred. The BOR status bit is a
“don’t care” and is not necessarily predictable if the
brown-out circuit is disabled (by setting BODEN bit = 0
in the Configuration word).
Bit1 is POR (Power-on Reset). It is a ‘0’ on Power-on
Reset and unaffected otherwise. The user must write a
‘1’ to this bit following a Power-on Reset. On a subse-
quent RESET, if POR is ‘0’, it will indicate that a Power-
on Reset must have occurred (V
low).
—
OSC
POWER CONTROL (PCON)/STATUS
REGISTER
72 ms + 1024 T
Brown-out Reset
72 ms
PIC16C432
OSC
DD
may have gone too
DS41140B-page 49
from SLEEP
1024 T
Wake-up
—
OSC